Datasheet LTC2321-16 (Analog Devices)

LTC2321-16 Dual, 16-Bit, 2Msps Differential Input ADC with Wide Input Common Mode Range
FEATURES DESCRIPTION
n
2Msps Throughput Rate
The LTC®2321-16 is a low noise, high speed dual 16-bit n
±4LSB INL (Typ)
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input Common
Operating from a single 3.3V or 5V supply, the LTC2321-
Mode Range
16 has an 8VP-P differential input range, making it ideal n
81dB SNR (Typ) at fIN = 500kHz
for applications which require a wide dynamic range with n
–90dB THD (Typ) at fIN = 500kHz
high common mode rejection. The LTC2321-16 achieves n No Cycle Latency ±4LSB INL typical, no missing codes at 16 bits and 81dB n Guaranteed Operation to 125°C SNR. n Single 3.3V or 5V Supply The LTC2321-16 has an onboard low drift (20ppm/°C n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal max) 2.048V or 4.096V temperature-compensated Reference reference. The LTC2321-16 also has a high speed SPI- n 1.8V to 2.5V I/O Voltages compatible serial interface that supports CMOS or LVDS. n CMOS or LVDS SPI-Compatible Serial I/O The fast 2Msps per channel throughput with no cycle n Power Dissipation 31mW/Ch (Typ) latency makes the LTC2321-16 ideally suited for a wide n Small 28-Lead (4mm × 5mm) QFN Package variety of high speed applications. The LTC2321-16 dissipates only 31mW per channel and offers nap and
APPLICATIONS
sleep modes to reduce the power consumption to 5μW n High Speed Data Acquisition Systems for further power savings during inactive periods. n Communications All registered trademarks and trademarks are the property of their respective owners. n Remote Data Acquisition n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT f
3.3V OR 5V
S = 2Msps, fIN = 500kHz
0
DIFFERENTIAL INPUTS
10µF SNR = 81.0dB
NO CONFIGURATION REQUIRED
THD = –94.6dB
IN+, IN–
–20 SINAD = 80.8dB VDD REFOUT1 INSTRUMENTATION DIFFERENTIAL 10µF SFDR = 100.9dB 25Ω –40 VBYP1 AIN1+ 1µF
LTC2321-16
–60 REFOUT2 0V 0V 220pF 10µF VBYP2 –80 1µF BIPOLAR UNIPOLAR 25Ω AMPLITUDE (dBFS) –100 A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC AIN2– CLKOUT (FPGA, CPLD, –120 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV GND OGND OV –140 DD 1.8V TO 2.5V 0 0.2 0.4 0.6 0.8 1 1µF FREQUENCY (MHz) 232116 TA01a 232116 TA01b Rev. D Document Feedback For more information www.analog.com 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts