AD7124-4-EPEnhanced ProductABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCETable 2. Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to ParameterRating PCB thermal design is required. AVDD to AVSS −0.3 V to +3.96 V IOVDD to DGND −0.3 V to +3.96 V θJA is the natural convection, junction to ambient thermal IOVDD to AVSS −0.3 V to +5.94 V resistance measured in a one cubic foot sealed enclosure. AVSS to DGND −1.98 V to +0.3 V θJC is the junction to case thermal resistance. Analog Input Voltage to AVSS −0.3 V to AVDD + 0.3 V Reference Input Voltage to AVSS −0.3 V to AVDD + 0.3 V Table 3. Thermal Resistance Digital Input Voltage to DGND −0.3 V to IOVDD + 0.3 V Package Type1θJAθJC Unit Digital Output Voltage to DGND −0.3 V to IOVDD + 0.3 V RU-24 128 42 °C/W AINx/Digital Input Current 10 mA 1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal Operating Temperature Range −55°C to +125°C test board. See JEDEC JESD51. Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150°C ESD CAUTION Lead Temperature, Soldering Reflow 260°C ESD Ratings Human Body Model (HBM) 4 kV Field-Induced Charged Device 1250 V Model (FICDM) Machine Model 400 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 10 of 17 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE