Datasheet LTC2344-16 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Quad, 16-Bit, 400ksps/ch Differential SoftSpan ADC with Wide Input Common Mode Range |
| Páginas / Página | 40 / 7 — ADC. TIMING CHARACTERISTICS The. denotes the specifications which apply … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 1.5 Mb |
| Idioma del documento | Inglés |
ADC. TIMING CHARACTERISTICS The. denotes the specifications which apply over the full operating
Línea de modelo para esta hoja de datos
Versión de texto del documento
LTC2344-16
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 4 l 425 • N –20 475 • N –20 525 • N –20 ns tACQ Acquisition Time 4 Channels Enabled, fSMPL = 400ksps l 390 600 ns (tACQ = tCYC – tCONV – tBUSYLH) 3 Channels Enabled, fSMPL = 500ksps l 415 575 ns 2 Channels Enabled, fSMPL = 666ksps l 440 550 ns 1 Channel Enabled, fSMPL = 1000ksps l 465 525 ns tCNVH CNV High Time l 40 ns tCNVL CNV Low Time l 390 ns tBUSYLH CNV↑ to BUSY Delay CL = 25pF l 30 ns tQUIET Digital I/O Quiet Time from CNV↑ l 20 ns tPDH PD High Time l 40 ns tPDL PD Low Time l 40 ns tWAKE REFBUF Wake-Up Time CREFBUF = 47μF, CREFIN = 0.1μF 200 ms
CMOS I/O Mode
tSCKI SCKI Period (Notes 16, 17) l 10 ns tSCKIH SCKI High Time l 4 ns tSCKIL SCKI Low Time l 4 ns tSSDISCKI SDI Setup Time from SCKI↑ (Note 16) l 2 ns tHSDISCKI SDI Hold Time from SCKI↑ (Note 16) l 1 ns tDSDOSCKI SDO Data Valid Delay from SCKI↑ CL = 25pF (Note 16) l 7.5 ns tHSDOSCKI SDO Remains Valid Delay from SCKI↑ CL = 25pF (Note 16) l 1.5 ns tSKEW SDO to SCKO Skew (Note 16) l –1 0 1 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ CL = 25pF (Note 16) l 0 ns tEN Bus Enable Time After CS↓ (Note 16) l 15 ns tDIS Bus Relinquish Time After CS↑ (Note 16) l 15 ns
LVDS I/O Mode
tSCKI SCKI Period (Note 18) l 4 ns tSCKIH SCKI High Time (Note 18) l 1.5 ns tSCKIL SCKI Low Time (Note 18) l 1.5 ns tSSDISCKI SDI Setup Time from SCKI (Notes 10, 18) l 1.2 ns tHSDISCKI SDI Hold Time from SCKI (Notes 10, 18) l –0.2 ns tDSDOSCKI SDO Data Valid Delay from SCKI (Notes 10, 18) l 6 ns tHSDOSCKI SDO Remains Valid Delay from SCKI (Notes 10, 18) l 1 ns tSKEW SDO to SCKO Skew (Note 10) l –0.4 0 0.4 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ (Note 10) l 0 ns tEN Bus Enable Time After CS↓ l 50 ns tDIS Bus Relinquish Time After CS↑ l 15 ns Rev A For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagrams Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 4 l 425 • N –20 475 • N –20 525 • N –20 ns tACQ Acquisition Time 4 Channels Enabled, fSMPL = 400ksps l 390 600 ns (tACQ = tCYC – tCONV – tBUSYLH) 3 Channels Enabled, fSMPL = 500ksps l 415 575 ns 2 Channels Enabled, fSMPL = 666ksps l 440 550 ns 1 Channel Enabled, fSMPL = 1000ksps l 465 525 ns tCNVH CNV High Time l 40 ns tCNVL CNV Low Time l 390 ns tBUSYLH CNV↑ to BUSY Delay CL = 25pF l 30 ns tQUIET Digital I/O Quiet Time from CNV↑ l 20 ns tPDH PD High Time l 40 ns tPDL PD Low Time l 40 ns tWAKE REFBUF Wake-Up Time CREFBUF = 47μF, CREFIN = 0.1μF 200 ms
CMOS I/O Mode
tSCKI SCKI Period (Notes 16, 17) l 10 ns tSCKIH SCKI High Time l 4 ns tSCKIL SCKI Low Time l 4 ns tSSDISCKI SDI Setup Time from SCKI↑ (Note 16) l 2 ns tHSDISCKI SDI Hold Time from SCKI↑ (Note 16) l 1 ns tDSDOSCKI SDO Data Valid Delay from SCKI↑ CL = 25pF (Note 16) l 7.5 ns tHSDOSCKI SDO Remains Valid Delay from SCKI↑ CL = 25pF (Note 16) l 1.5 ns tSKEW SDO to SCKO Skew (Note 16) l –1 0 1 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ CL = 25pF (Note 16) l 0 ns tEN Bus Enable Time After CS↓ (Note 16) l 15 ns tDIS Bus Relinquish Time After CS↑ (Note 16) l 15 ns
LVDS I/O Mode
tSCKI SCKI Period (Note 18) l 4 ns tSCKIH SCKI High Time (Note 18) l 1.5 ns tSCKIL SCKI Low Time (Note 18) l 1.5 ns tSSDISCKI SDI Setup Time from SCKI (Notes 10, 18) l 1.2 ns tHSDISCKI SDI Hold Time from SCKI (Notes 10, 18) l –0.2 ns tDSDOSCKI SDO Data Valid Delay from SCKI (Notes 10, 18) l 6 ns tHSDOSCKI SDO Remains Valid Delay from SCKI (Notes 10, 18) l 1 ns tSKEW SDO to SCKO Skew (Note 10) l –0.4 0 0.4 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ (Note 10) l 0 ns tEN Bus Enable Time After CS↓ l 50 ns tDIS Bus Relinquish Time After CS↑ l 15 ns Rev A For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagrams Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts