Remote Temperature Sensor with SMBus Serial Interface above VCC - 1V (typ) or below VDXN + 50mv (typ), a Table 2. Read Format for Alert Response fault is detected and ALERT is asserted. ADC reads Address (0001 100) +127°C. Also, if the ADC has an extremely low differen- tial input voltage, the diode is assumed to be shorted BITNAMEFUNCTION and a fault is detected. Note that the diode fault is not checked until a conversion is initiated, so immediately 7 ADD7 after power-on reset, the status byte indicates no fault (MSB) is present even if the diode path is broken. 6 ADD6 MAX1618 Provide the current MAX1618 ALERT Interrupts 5 ADD5 slave address that was latched at Normally, the ALERT interrupt output signal is latched 4 ADD4 POR (Table 6) and can be cleared only by reading the Alert Response 3 ADD3 address. Interrupts are generated in response to THIGH 2 ADD2 and TLOW comparisons and when the remote diode is 1 ADD1 faulted. The interrupt does not halt automatic conver- sions; new temperature data continues to be available 0 ADD0 Logic 1 over the SMBus interface after ALERT is asserted. The (LSB) interrupt output pin is open-drain so the devices can share a common interrupt line. Receive Byte transmission (a protocol that lacks the The interface responds to the SMBus Alert Response command byte) that occurs immediately after POR address, an interrupt pointer return-address feature returns the current remote temperature data. (see Alert Response Address section). Before taking The one-shot command immediately forces a new con- corrective action, always check to ensure that an inter- version cycle to begin. A new conversion begins in rupt is valid by reading the current temperature. software standby mode (RUN/STOP bit = high). The The alert activates only once per crossing of a given device returns to standby mode after the conversion. If temperature threshold to prevent any re-entrant inter- a conversion is in progress when a one-shot command rupts. To enable a new interrupt, rewrite the value of the is received, the command is ignored. If a one-shot violated temperature threshold. command is received in autoconvert mode (RUN/STOP bit = low) between conversions, a new conversion Alert Response Address begins; the conversion rate timer is reset, and the next The SMBus Alert Response interrupt pointer provides automatic conversion takes place after a full delay quick fault identification for simple slave devices that elapses. lack the complex, expensive logic needed to be a bus master. Upon receiving an ALERT interrupt signal, the Configuration Byte Functions host master can broadcast a Receive Byte transmission The configuration byte register (Table 4) is used to to the Alert Response slave address (0001100). Any mask (disable) interrupts, to put the device in software- slave device that generated an interrupt then attempts standby or thermostat mode, change the polarity of the to identify itself by putting its own address on the bus alert output (thermostat mode only), and to change the (Table 2). diode bias current. The lower three bits are internally driven low (000), making them “don’t care” bits. Write The Alert Response can activate several different slave zeros to these bits. The serial interface can read back devices simultaneously, similar to the I2C General Call. this register’s contents. If more than one slave attempts to respond, bus arbitra- tion rules apply, and the device with the lower address Status Byte Functions code wins. The losing device does not generate an The status byte register (Table 5) indicates which (if acknowledgement and continues to hold the ALERT any) temperature thresholds have been exceeded. This line low until serviced (implies that the host interrupt byte also indicates whether the ADC is converting and input is level sensitive). Successful reading of the alert whether there is a fault in the remote diode DXP-DXN response address clears the interrupt latch. path. After POR, the normal state of all the flag bits is zero, assuming none of the alarm conditions is present. Command Byte Functions The status byte is cleared by any successful read of The 8-bit command byte register (Table 3) is the master the status byte. Note that the ALERT interrupt latch is index that points to the other registers within the not automatically cleared when the status flag bit is MAX1618. The register’s POR state is 0000 0001, so a cleared. I2C is a trademark of Philips Corp. 10______________________________________________________________________________________