Datasheet ADuM4136 (Analog Devices) - 4

FabricanteAnalog Devices
DescripciónSingle-/Dual-Supply, High Voltage Isolated IGBT Gate Driver
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ADuM4136. Data Sheet. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments. PACKAGE CHARACTERISTICS. Table 2. Parameter

ADuM4136 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments PACKAGE CHARACTERISTICS Table 2 Parameter

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ADuM4136 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Propagation Delay3 t 2 2 DHL, tDLH 40 55 68 ns CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 3.9 Ω Propagation Delay Skew4 t 2 2 PSK 15 ns CL = 2 nF, RGON = RGOFF = 3.9 Ω Output Rise/Fall Time (10% to 90%) t 2 2 R/tF 11 16 22.9 ns CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 3.9 Ω Blanking Capacitor Discharge Switch Masking tDESAT_DELAY 213 312 615 ns Time to Report Desaturation Fault to FAULT Pin tREPORT 1.3 2 μs Common-Mode Transient Immunity (CMTI) |CM| Static CMTI5 100 kV/μs VCM = 1500 V Dynamic CMTI6 100 kV/μs VCM = 1500 V 1 The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed. 2 See the Power Dissipation section. 3 tDLH propagation delay is measured from the time of the input rising logic high threshold, VIH, to the output rising 10% threshold of the VOUT signal. tDHL propagation delay is measured from the input falling logic low threshold, VIL, to the output falling 90% threshold of the VOUT signal. See Figure 22 for waveforms of propagation delay parameters. 4 tPSK is the magnitude of the worst case difference in tDLH and/or tDHL that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. See Figure 22 for waveforms of propagation delay parameters. 5 Static common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with inputs held either high or low such that the output voltage remains either above 0.8 × VDD2 for output high, or 0.8 V for output low. Operation with transients above the recommended levels can cause momentary data upsets. 6 Dynamic common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with the switching edge coincident with the transient test pulse. Operation with transients above the recommended levels can cause momentary data upsets.
PACKAGE CHARACTERISTICS Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input Side to High-Side Output)1 RI-O 1012 Ω Capacitance (Input Side to High-Side Output)1 CI-O 2.0 pF Input Capacitance CI 4.0 pF Junction to Ambient Thermal Resistance θJA 75.4 °C/W 4-layer printed circuit board (PCB) Junction to Case Thermal Resistance θJC 35.4 °C/W 4-layer PCB 1 The device is considered a two-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM4136 is pending approval by the organizations listed in Table 3.
Table 3. UL (Pending) CSA (Pending) VDE (Pending)
Recognized under UL 1577 Approved under CSA Component Acceptance Notice 5A Certified according to VDE0884-102 Component Recognition Program1 Single Protection, Basic insulation per CSA 60950-1-07+A1+A2 and IEC 60950-1 Basic insulation, 849 V peak 5000 V rms Isolation Voltage 2nd Ed.+A1+A2, 780 V rms (1103 V peak) maximum working voltage CSA 60950-1-07+A1+A2 and IEC 60950-1 Second Ed.+A1+A2, 390 V rms (551 V peak) maximum working voltage File E214100 File 205078 File 2471900-4880-0001 1 In accordance with UL 1577, each ADuM4136 is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (current leakage detection limit = 10 μA). 2 In accordance with DIN V VDE V 0884-10, each ADuM4136 is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial discharge detection limit = 5 pC). An asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS Table 4. Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 5000 V rms 1-minute duration Minimum External Air Gap (Clearance) L(I01) 7.8 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 7.8 min mm Measured from input terminals to output terminals, shortest distance path along body Minimum Internal Gap (Internal Clearance) 0.026 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) Rev. 0 | Page 4 of 16 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Electrical Characteristics Package Characteristics Regulatory Information Insulation and Safety Related Specifications DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performanace Characteristics Applications Information PCB Layout Propagation Delay Related Parameters Protection Features Fault Reporting Desaturation Detection Thermal Shutdown Undervoltage Lockout (UVLO) Faults READY Pin Pin Pin VI+ and VI− Operation Gate Resistance Selection Power Dissipation DC Correctness and Magnetic Field Immunity Insulation Lifetime Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example Typical Application Outline Dimensions Ordering Guide