Datasheet ADuM4138 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | High Voltage, Isolated IGBT Gate Driver with Isolated Flyback Controller |
| Páginas / Página | 24 / 7 — Data Sheet. ADuM4138. SPI TIMING SPECIFICATIONS. Table 2. Parameter … |
| Formato / tamaño de archivo | PDF / 733 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADuM4138. SPI TIMING SPECIFICATIONS. Table 2. Parameter Description. Min. Typ. Max. Unit. SPI Timing Diagram. tDS. tHIGH. tCLK
Línea de modelo para esta hoja de datos
Versión de texto del documento
Data Sheet ADuM4138 SPI TIMING SPECIFICATIONS
SPI timing specifications are guaranteed by design. All devices are production tested with 200 kHz SPI communication.
Table 2. Parameter Description Min Typ Max Unit
tS Time to first clock edge 8 μs tDS Set period 1 μs tDH Hold period 1 μs tCLK Clock period 5 μs tH Release time 8 μs tHIGH Clock time high 100 ns tLOW Clock time low 100 ns tOV Output valid time 240 ns
SPI Timing Diagram tDS tHIGH tCLK t t t S DH tLOW H CS SCLK DON’T CARE DON’T CARE MOSI DON’T CARE MBZ RW0 A1 A0 MBZ MBZ MBZ MBZ D23 D5 D4 D3 D1 D0 DON’T CARE tOV
4 -00
MISO HIGH-Z 0 RW0′ A1′ A0′ 0 0 0 0 D23′ D5′ D4′ D3′ D1′ D0′ DON’T CARE
6 03 16 Figure 2. SPI Timing Diagram
PACKAGE CHARACTERISTICS Table 3. Parameter Symbol Min Typ Max Unit
Resistance (Input Side to High-Side Output)1 RI-O 1012 Ω Capacitance (Input Side to High-Side Output)1 CI-O 2 pF Input Capacitance CI 4 pF 1 The device is considered a two terminal device: Pin 1 through Pin 14 are shorted together, and Pin 15 through Pin 28 are shorted together. Rev. 0 | Page 7 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ELECTRICAL CHARACTERISTICS SPI TIMING SPECIFICATIONS SPI Timing Diagram PACKAGE CHARACTERISTICS REGULATORY INFORMATION (PENDING) INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10):2016-12 INSULATION CHARACTERISTICS (PENDING) RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PCB LAYOUT ISOLATED FLYBACK CONTROLLER SPI AND EEPROM OPERATION SPI Programming USER REGISTER MAP USER REGISTER BITS OFFSET_2[5:0] Bits GAIN_2[5:0] Bits OFFSET_1[5:0] Bits GAIN_1[5:0] Bits CONFIGURATION REGISTER BITS OT_FAULT_OP Bit OT_FAULT_SEL Bit OC_TIME_OP Bit OC_2LEV_OP Bits LOW_T_OP Bit OC_BLANK_OP Bit tBLANK[3:0] Bits ECC_OFF_OP Bit FLYBACK_V[3:0] Bits T_RAMP_OP Bit PWM_OSC Bit CONTROL REGISTER BITS ECC2_DBL_ERR Bit ECC2_SNG_ERR Bit ECC1_DBL_ERR Bit ECC1_SNG_ERR Bit PROG_BUSY Bit SIM_TRIM Bit PROPAGATION DELAY RELATED PARAMETERS PROTECTION FEATURES Primary Side UVLO Fault Reporting Overcurrent Detection High Speed, Two-Level, Turn Off Miller Clamp Desaturation Detection Thermal Shutdown Isolated Temperature Sensor POWER DISSIPATION INSULATION LIFETIME DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
SPI timing specifications are guaranteed by design. All devices are production tested with 200 kHz SPI communication.
Table 2. Parameter Description Min Typ Max Unit
tS Time to first clock edge 8 μs tDS Set period 1 μs tDH Hold period 1 μs tCLK Clock period 5 μs tH Release time 8 μs tHIGH Clock time high 100 ns tLOW Clock time low 100 ns tOV Output valid time 240 ns
SPI Timing Diagram tDS tHIGH tCLK t t t S DH tLOW H CS SCLK DON’T CARE DON’T CARE MOSI DON’T CARE MBZ RW0 A1 A0 MBZ MBZ MBZ MBZ D23 D5 D4 D3 D1 D0 DON’T CARE tOV
4 -00
MISO HIGH-Z 0 RW0′ A1′ A0′ 0 0 0 0 D23′ D5′ D4′ D3′ D1′ D0′ DON’T CARE
6 03 16 Figure 2. SPI Timing Diagram
PACKAGE CHARACTERISTICS Table 3. Parameter Symbol Min Typ Max Unit
Resistance (Input Side to High-Side Output)1 RI-O 1012 Ω Capacitance (Input Side to High-Side Output)1 CI-O 2 pF Input Capacitance CI 4 pF 1 The device is considered a two terminal device: Pin 1 through Pin 14 are shorted together, and Pin 15 through Pin 28 are shorted together. Rev. 0 | Page 7 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ELECTRICAL CHARACTERISTICS SPI TIMING SPECIFICATIONS SPI Timing Diagram PACKAGE CHARACTERISTICS REGULATORY INFORMATION (PENDING) INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10):2016-12 INSULATION CHARACTERISTICS (PENDING) RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PCB LAYOUT ISOLATED FLYBACK CONTROLLER SPI AND EEPROM OPERATION SPI Programming USER REGISTER MAP USER REGISTER BITS OFFSET_2[5:0] Bits GAIN_2[5:0] Bits OFFSET_1[5:0] Bits GAIN_1[5:0] Bits CONFIGURATION REGISTER BITS OT_FAULT_OP Bit OT_FAULT_SEL Bit OC_TIME_OP Bit OC_2LEV_OP Bits LOW_T_OP Bit OC_BLANK_OP Bit tBLANK[3:0] Bits ECC_OFF_OP Bit FLYBACK_V[3:0] Bits T_RAMP_OP Bit PWM_OSC Bit CONTROL REGISTER BITS ECC2_DBL_ERR Bit ECC2_SNG_ERR Bit ECC1_DBL_ERR Bit ECC1_SNG_ERR Bit PROG_BUSY Bit SIM_TRIM Bit PROPAGATION DELAY RELATED PARAMETERS PROTECTION FEATURES Primary Side UVLO Fault Reporting Overcurrent Detection High Speed, Two-Level, Turn Off Miller Clamp Desaturation Detection Thermal Shutdown Isolated Temperature Sensor POWER DISSIPATION INSULATION LIFETIME DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS