Datasheet ADuM4137 (Analog Devices)

High Voltage, Isolated IGBT Gate Driver with Fault Detection Data Sheet ADuM4137 FEATURES
Integrated onto the ADuM4137 is an overcurrent detection
6 A peak drive output capability
feature that protects the IGBT in case of overcurrent events. The
Internal turn off NFET, on resistance: <0.95 Ω
split emitter overcurrent detection is coupled with a high speed,
Internal turn on PFET, on resistance: <1.18 Ω
two-level turn off in case of faults.
Split emitter overcurrent detection
The ADuM4137 provides a Miller clamp control signal for the
Miller clamp output with gate sense input
external metal-oxide semiconductor field effect transistor
Isolated fault output
(MOSFET) to provide robust IGBT turn off with a single rail
Isolated temperature sensor read back
supply when the gate voltage drops below 2.0 V (typical) and
Propagation delay
above GND2. Operation with unipolar secondary supplies is
Rising: 105 ns typical
possible, with or without the Mil er clamp operation.
Falling: 107 ns typical
A low gate voltage detection circuit can trigger a fault if the gate
Minimum pulse width: 70 ns
voltage does not go above the internal threshold (V
Operating junction temperature range (−40°C to +150°C)
DVL) within the time allowed from turn on (t
V
DVL). This circuit allows
DD1 and VDD2 UVLO
detection of IGBT device failures that exhibit gate shorts or
ASC input
other causes of weak drive.
8.3 mm creepage distance Safety and regulatory approvals
The secondary falling UVLO is set to 11.24 V (typical) for
5 kV rms for 1 minute per UL 1577
common IGBT two-level plateau voltage levels.
CSA Component Acceptance Notice 5A
The ADuM4137 provides for in field programming of
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
temperature. Two temperature sensor pins al ow isolated
VIORM = 849 VPEAK (reinforced/basic)
monitoring of system temperatures at the IGBTs, sensing diode
AEC-Q100 qualified for automotive applications
gains and offsets by means of a serial port interface (SPI) bus on
APPLICATIONS
the primary side of the device. Values are stored on an EEPROM located on the secondary side. Additional y, programming is
MOSFET/IGBT gate drivers
available for specific voltage offsets, temperature sensing
Photovoltaic (PV) inverters
reporting frequencies, and important delays.
Motor drives Power supplies
The ASC pin on the secondary side on the ADuM4137 al ows the driver to be switched on from the secondary side if no faults
GENERAL DESCRIPTION
are present. The ADuM41371 is a single-channel gate driver specifically optimized for driving insulated gate bipolar transistors (IGBTs). Analog Devices, Inc., iCoupler® technology provides isolation between the input signal and the output gate drive. The Analog Devices chip scale transformers also provide isolated communication of control information between the high voltage and low voltage domains of the chip. Information on the status of the chip can be read back from the dedicated fault outputs. The ADuM4137 provides isolated fault reporting for overcurrent events, remote temperature overheating events, undervoltage lockout (UVLO), and thermal shutdown (TSD). 1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ELECTRICAL CHARACTERISTICS SPI TIMING SPECIFICATIONS SPI Timing Diagram PACKAGE CHARACTERISTICS REGULATORY INFORMATION INSULATION AND SAFETY RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PCB LAYOUT SPI AND EEPROM OPERATION SPI Programming USER REGISTER MAP USER REGISTER BITS OFFSET_2[5:0] Bits GAIN_2[5:0] Bits OFFSET_1[5:0] Bits GAIN_1[5:0] Bits CONFIGURATION REGISTER BITS OT_FAULT_OP Bit OT_FAULT_SEL Bit OC_TIME_OP Bit OC_2LEV_OP Bit LOW_T_OP Bit OC_BLANK_OP Bit tBLANK[3:0] Bits ECC_OFF_OP Bit T_RAMP_OP Bit PWM_OSC CONTROL REGISTER BITS ECC2_DBL_ERR Bit ECC2_SNG_ERR Bit ECC1_DBL_ERR Bit ECC1_SNG_ERR Bit PROG_BUSY Bit SIM_TRIM Bit SPI SAFETY PROPAGATION DELAY RELATED PARAMETERS PROTECTION FEATURES Primary Side UVLO Fault Reporting Overcurrent Detection High Speed, Two-Level Turn Off Miller Clamp Thermal Shutdown ASC Pin Functionality Isolated Temperature Sensor Low Temperature Operation Mode FAULTB Pin DRIVER_FAULTB Pin UVLO_FAULTB Pin VDD2 UVLO Fault UVLO_FAULTB Fault, Gate Low Dead Time Control DRIVER_FAULTB Fault, Dead Time Fault Power Dissipation INSULATION LIFETIME DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS