Datasheet STSPIN32F0B (STMicroelectronics) - 8
| Fabricante | STMicroelectronics |
| Descripción | Advanced single shunt BLDC controller with embedded STM32 MCU |
| Páginas / Página | 36 / 8 — STSPIN32F0B. Electrical characteristics. Symbol. Parameter. Test … |
| Formato / tamaño de archivo | PDF / 6.5 Mb |
| Idioma del documento | Inglés |
STSPIN32F0B. Electrical characteristics. Symbol. Parameter. Test condition. Min. Typ. Max. Unit. DS12907. Rev 1. page 8/36
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STSPIN32F0B Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit
Open loop, VDDA floating fSW Maximum SW switching frequency - 200 330 kHz ISW = 100 mA RSWDS(ON) Switch ON resistance ISW = 200 mA - 1.4 - Ω η Efficiency VM = 8 V; IDDA = IDDA,max - 80 - % ISW,peak Peak current threshold - - 320 - mA IOVC Latched overcurrent threshold - - 1 - A tSS Soft-start time - 2.5 5 7.5 ms Linear regulator VM = 13 ÷ 45 V (3) V Linear regulator output and gate driver supply REG12 11.4 12 12.6 V voltage IO = 10 mA VREG12,drop Drop voltage VM = 8 ÷ 11 V, IO = 10 mA - 200 400 mV IREG12,lim Linear regulator current limit VM = 13 V 20 - 40 mA Gate drivers ISI TJ = 25 °C 400 600 - mA Maximum sink/source current capabilities ISO Full temperature range 350 - - mA RPDin Input lines pull-down resistor - 30 60 95 kΩ ton Input-to-output propagation delay (4) - - 20 40 ns toff MT Delay matching, HS and LS turn-on/off (5) - - 10 20 ns RDS_diode Bootstrap diode ON resistance - - 120 240 Ω Operational amplifier Vicm Input common mode voltage range - -0.1 - VDD + 0.1 V Vout = 1.65; Tj = 25 °C - 1 6 mV VOPio Input offset voltage Vout = 1.65; full temp. range - - 7 mV IOPio Input offset current Vout = 1.65 - - 100 pA IOPib Input bias current - - 100 pA CMRR Common mode rejection ratio 0 to 3.3 V; Vout = 1.65 V 70 90 - dB AOL Open loop gain RL = 10 kΩ; Vout = 1.65 - 90 - dB VDD - VOH High level output voltage RL = 10 kΩ - 15 40 mV VOL Low level output voltage RL = 10 kΩ - 15 40 mV Vout = 3.3 V; Tj = 25 °C 18 - - mA Sink output current Vout = 3.3 V; full temp. range 16 - - IOUT Vout = 0 V; Tj = 25 °C 18 - - mA Source output current Vout = 0 V; full temp. range 16 - - RL = 2 kΩ; CL = 100 pF GBP Gain bandwidth product 10 18 - MHz Vout = 1.65 Phase margin = 45° Gain Minimum gain for stability - 4 - V/V 0.2 V < Vout < VDD - 0.2
DS12907
-
Rev 1 page 8/36
Document Outline 1 Description 2 Block diagrams 3 Electrical data 3.1 Absolute maximum ratings 3.2 ESD protections 3.3 Recommended operating conditions 3.4 Thermal data 4 Electrical characteristics 5 Pin description 6 Device description 6.1 UVLO and thermal protections 6.1.1 UVLO on supply voltages 6.1.2 Thermal protection 6.2 DC/DC buck regulator 6.2.1 External optional 3.3 V supply voltage 6.3 Linear regulator 6.4 Standby mode 6.5 Gate drivers 6.6 Microcontroller unit 6.6.1 Memories and boot mode 6.6.2 Power management 6.6.3 High-speed external clock source 6.6.4 Advanced-control timer (TIM1) 6.7 Test mode 6.8 Operational amplifier 6.9 Comparator 6.10 ESD protection strategy 7 Application example 8 Package information 8.1 VFQFPN48 7 x 7 package information Revision history Contents List of tables List of figures
STSPIN32F0B Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit
Open loop, VDDA floating fSW Maximum SW switching frequency - 200 330 kHz ISW = 100 mA RSWDS(ON) Switch ON resistance ISW = 200 mA - 1.4 - Ω η Efficiency VM = 8 V; IDDA = IDDA,max - 80 - % ISW,peak Peak current threshold - - 320 - mA IOVC Latched overcurrent threshold - - 1 - A tSS Soft-start time - 2.5 5 7.5 ms Linear regulator VM = 13 ÷ 45 V (3) V Linear regulator output and gate driver supply REG12 11.4 12 12.6 V voltage IO = 10 mA VREG12,drop Drop voltage VM = 8 ÷ 11 V, IO = 10 mA - 200 400 mV IREG12,lim Linear regulator current limit VM = 13 V 20 - 40 mA Gate drivers ISI TJ = 25 °C 400 600 - mA Maximum sink/source current capabilities ISO Full temperature range 350 - - mA RPDin Input lines pull-down resistor - 30 60 95 kΩ ton Input-to-output propagation delay (4) - - 20 40 ns toff MT Delay matching, HS and LS turn-on/off (5) - - 10 20 ns RDS_diode Bootstrap diode ON resistance - - 120 240 Ω Operational amplifier Vicm Input common mode voltage range - -0.1 - VDD + 0.1 V Vout = 1.65; Tj = 25 °C - 1 6 mV VOPio Input offset voltage Vout = 1.65; full temp. range - - 7 mV IOPio Input offset current Vout = 1.65 - - 100 pA IOPib Input bias current - - 100 pA CMRR Common mode rejection ratio 0 to 3.3 V; Vout = 1.65 V 70 90 - dB AOL Open loop gain RL = 10 kΩ; Vout = 1.65 - 90 - dB VDD - VOH High level output voltage RL = 10 kΩ - 15 40 mV VOL Low level output voltage RL = 10 kΩ - 15 40 mV Vout = 3.3 V; Tj = 25 °C 18 - - mA Sink output current Vout = 3.3 V; full temp. range 16 - - IOUT Vout = 0 V; Tj = 25 °C 18 - - mA Source output current Vout = 0 V; full temp. range 16 - - RL = 2 kΩ; CL = 100 pF GBP Gain bandwidth product 10 18 - MHz Vout = 1.65 Phase margin = 45° Gain Minimum gain for stability - 4 - V/V 0.2 V < Vout < VDD - 0.2
DS12907
-
Rev 1 page 8/36
Document Outline 1 Description 2 Block diagrams 3 Electrical data 3.1 Absolute maximum ratings 3.2 ESD protections 3.3 Recommended operating conditions 3.4 Thermal data 4 Electrical characteristics 5 Pin description 6 Device description 6.1 UVLO and thermal protections 6.1.1 UVLO on supply voltages 6.1.2 Thermal protection 6.2 DC/DC buck regulator 6.2.1 External optional 3.3 V supply voltage 6.3 Linear regulator 6.4 Standby mode 6.5 Gate drivers 6.6 Microcontroller unit 6.6.1 Memories and boot mode 6.6.2 Power management 6.6.3 High-speed external clock source 6.6.4 Advanced-control timer (TIM1) 6.7 Test mode 6.8 Operational amplifier 6.9 Comparator 6.10 ESD protection strategy 7 Application example 8 Package information 8.1 VFQFPN48 7 x 7 package information Revision history Contents List of tables List of figures