Datasheet MAX22513 (Maxim) - 9
| Fabricante | Maxim |
| Descripción | Surge Protected Dual Driver IO-Link Device Transceiver with DC-DC |
| Páginas / Página | 46 / 9 — AC Electrical Characteristics (continued). PARAMETER. SYMBOL. CONDITIONS. … |
| Formato / tamaño de archivo | PDF / 1.3 Mb |
| Idioma del documento | Inglés |
AC Electrical Characteristics (continued). PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS
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AC Electrical Characteristics (continued)
(V24 = 18V to 30V, V5 = 4.5V to 5.5V, VL = 2.5V to 5.5V, VDGND = VSGND = VGND = 0V, All logic inputs at VL or GND, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V24 = 24V, V5 = 5V, VL = 3.3V and TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS / C/Q, DO/DI RECEIVER
C/Q Receiver Low-to-High RXFILTER = 1 0.75 1.2 1.7 Propagation Delay tPRLH_CQ Figure 4 μs RXFILTER = 0 0.2 0.33 0.475 C/Q Receiver High-to-Low RXFILTER = 1 0.7 1.13 1.65 Propagation Delay tPRHL_CQ Figure 4 μs RXFILTER = 0 0.125 0.25 0.375 DO/DI Receiver Low-to-High DIFILTER = 1 1.3 2.1 2.9 Propagation Delay tPRLH_DI Figure 4 μs DIFILTER = 0 0.7 1.2 1.65 DO/DI Receiver High-to-Low DIFILTER = 1 1.1 1.8 2.55 Propagation Delay tPRHL_DI Figure 4 μs DIFILTER = 0 0.55 0.91 1.3
AC ELECTRICAL CHARACTERISTICS / WAKE-UP DETECTION (Figure 5)
Wake-Up Input Minimum Pulse Width tWUMIN C/Q load capacitance = 3nF 59.4 66 72.6 μs Wake-Up Input Maximum Pulse Width tWUMAX 85.5 95 104.5 μs WU Output Low Time tWUL Valid wake-up condition on C/Q 180 200 220 μs
AC ELECTRICAL CHARACTERISTICS / MCLK CLOCK
CLKDIV[1:0] = 00 3.594 3.686 3.779 CLKDIV[1:0] = 01 7.188 7.373 7.557 MCLK Frequency fMCLK MHz CLKDIV[1:0] = 10 14.377 14.746 15.114 CLKDIV[1:0] = 11 1.797 1.843 1.889
AC ELECTRICAL CHARACTERISTICS / SPI TIMING (CS/A0, SCLK, SDI/A1, SDO/SDA) (Figure 6)
Maximum SCLK Frequency fSPI_MAX Read/write 12 MHz SCLK Clock Period tCH+CL Read/write 80 ns SCLK Pulse Width High tCH Write only 20 ns SCLK Pulse Width Low tCL Write only 20 ns CS/A0 Fall to SCLK Rise t Time CSS 10 ns SCLK Rise to CS/A0 Rise t Hold Time CSH 10 ns SDI/A1 Hold Time tDH 5 ns SDI/A1 Setup Time tDS 5 ns SDO/SDA Output Data Propagation Delay tDO 32 ns SDO/SDA Rise and Fall Times tFT 1.5 ns Minimum CS/A0 Pulse tCSW 5 ns www.maximintegrated.com Maxim Integrated │ 9
AC Electrical Characteristics (continued)
(V24 = 18V to 30V, V5 = 4.5V to 5.5V, VL = 2.5V to 5.5V, VDGND = VSGND = VGND = 0V, All logic inputs at VL or GND, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V24 = 24V, V5 = 5V, VL = 3.3V and TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS / C/Q, DO/DI RECEIVER
C/Q Receiver Low-to-High RXFILTER = 1 0.75 1.2 1.7 Propagation Delay tPRLH_CQ Figure 4 μs RXFILTER = 0 0.2 0.33 0.475 C/Q Receiver High-to-Low RXFILTER = 1 0.7 1.13 1.65 Propagation Delay tPRHL_CQ Figure 4 μs RXFILTER = 0 0.125 0.25 0.375 DO/DI Receiver Low-to-High DIFILTER = 1 1.3 2.1 2.9 Propagation Delay tPRLH_DI Figure 4 μs DIFILTER = 0 0.7 1.2 1.65 DO/DI Receiver High-to-Low DIFILTER = 1 1.1 1.8 2.55 Propagation Delay tPRHL_DI Figure 4 μs DIFILTER = 0 0.55 0.91 1.3
AC ELECTRICAL CHARACTERISTICS / WAKE-UP DETECTION (Figure 5)
Wake-Up Input Minimum Pulse Width tWUMIN C/Q load capacitance = 3nF 59.4 66 72.6 μs Wake-Up Input Maximum Pulse Width tWUMAX 85.5 95 104.5 μs WU Output Low Time tWUL Valid wake-up condition on C/Q 180 200 220 μs
AC ELECTRICAL CHARACTERISTICS / MCLK CLOCK
CLKDIV[1:0] = 00 3.594 3.686 3.779 CLKDIV[1:0] = 01 7.188 7.373 7.557 MCLK Frequency fMCLK MHz CLKDIV[1:0] = 10 14.377 14.746 15.114 CLKDIV[1:0] = 11 1.797 1.843 1.889
AC ELECTRICAL CHARACTERISTICS / SPI TIMING (CS/A0, SCLK, SDI/A1, SDO/SDA) (Figure 6)
Maximum SCLK Frequency fSPI_MAX Read/write 12 MHz SCLK Clock Period tCH+CL Read/write 80 ns SCLK Pulse Width High tCH Write only 20 ns SCLK Pulse Width Low tCL Write only 20 ns CS/A0 Fall to SCLK Rise t Time CSS 10 ns SCLK Rise to CS/A0 Rise t Hold Time CSH 10 ns SDI/A1 Hold Time tDH 5 ns SDI/A1 Setup Time tDS 5 ns SDO/SDA Output Data Propagation Delay tDO 32 ns SDO/SDA Rise and Fall Times tFT 1.5 ns Minimum CS/A0 Pulse tCSW 5 ns www.maximintegrated.com Maxim Integrated │ 9