Datasheet ADL5570 (Analog Devices) - 10

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ADL5570 EVALUATION BOARD
The evaluation board layout is shown in Figure 16. The ADL5570 performance data was taken on a FR4 board. During board layout, 50 Ω RF trace impedance must be ensured. The output matching capacitor, C3, is placed 30 mils from the package edge. 16 -0 729 06 Figure 16. Evaluation Board Layout
Table 6. Evaluation Board Configuration Options Component Function Default Value
VPOS, VPOS1, GND Supply and Ground Connections. W1 = Installed TP1 (STBY) Transmit/Standby Mode: When STBY is low (0 V), the device operates in transmit Not applicable mode. When the radio is receiving data, STBY can be taken high (2.5 V), reducing the supply current to 10 mA. TP2 (VREG) Normal/Sleep Mode: When VREG is low, the device goes into sleep mode, Not applicable reducing the supply current to 10 μA. When VREG is high (2.85 V), the device operates in its normal transmit mode. When high, VREG draws a bias current of approximately 10 mA. TP5 (MODE), R1 High/Low Power Mode: Switches between high power mode and low power R1 = 50 kΩ (Size 0402) mode. When MODE is low (0 V), the device operates in high power mode. When MODE is high (2.5 V), the device operates in low power mode. L3 Input Interface: L3 matches the input to 50 Ω. L3 = 2.7 nH (Size 0402) C3, C4 Output Interface: C4 provides dc blocking, and C3 matches the output to 50 Ω. C4 = 39 pF (Size 0402) C3 = 3.3 pF (Size 0402) (Tight tolerance recommended) C2 Filter Interface: A ground-referenced capacitor should be connected to this C2 = 2.2 pF (Size 0402) node to reduce bias line noise. C7 to C12 Power Supply Decoupling: The capacitors, C7 through C12, are used for power C7 to C10 = 0.01 μF (Size 0402) supply decoupling. They should be placed as close as possible to the DUT. C11, C12 = 1 μF (Size 0402) L1, L2, C6, C5 RF Trap: L1, C6 and L2, C5 form tank circuits and prevent RF from propagating L1 = 1 nH (Size 0402) on the dc supply lines. C6 = 3.6 pF (Size 0402) L2 = 11 nH (Size 0402) C5 = Open Rev. 0 | Page 10 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS VCC = 3.5 V ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS BASIC CONNECTIONS Power Supply RF Input Interface RF Output Interface Transmit/Standby Enable VREG Enable MODE High Power/Low Power Enable 64 QAM OFDMA PERFORMANCE POWER-ADDED EFFICIENCY EVALUATION BOARD MEASUREMENT SETUP USING THE ADL5570 EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE