Datasheet X9312 (Intersil)
| Fabricante | Intersil |
| Descripción | Digitally Controlled Potentiometer (XDCP) |
| Páginas / Página | 9 / 1 — X9312. Terminal Voltage 0V to +15V, 100 Taps. NOT RECOMMENDED FOR NEW … |
| Formato / tamaño de archivo | PDF / 247 Kb |
| Idioma del documento | Inglés |
X9312. Terminal Voltage 0V to +15V, 100 Taps. NOT RECOMMENDED FOR NEW DESIGNS. Data Sheet. March 15, 2005. FN8176.0
Línea de modelo para esta hoja de datos
Versión de texto del documento
X9312
®
Terminal Voltage 0V to +15V, 100 Taps NOT RECOMMENDED FOR NEW DESIGNS Data Sheet March 15, 2005 FN8176.0 NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc Digitally Controlled Potentiometer DESCRIPTION (XDCP™)
The Intersil X9312 is a digitally controlled potentiometer (XDCP). The device consists of a
FEATURES
resistor array, wiper switches, a control section, and
• Solid-state potentiometer
nonvolatile memory. The wiper position is controlled
• 3-wire serial interface
by a 3-wire interface.
• Terminal voltage, 0 to +15V
The potentiometer is implemented by a resistor array
• 100 wiper tap points
composed of 99 resistive elements and a wiper
—Wiper position stored in nonvolatile memory
switching network. Between each element and at
and recalled on power-up
either end are tap points accessible to the wiper
• 99 resistive elements
terminal. The position of the wiper element is
—Temperature compensated
controlled by the CS, U/D, and INC inputs. The
—End to end resistance range ± 20%
position of the wiper can be stored in nonvolatile
• Low power CMOS
memory and then be recalled upon a subsequent
—VCC = 5V
power-up operation.
—Active current, 3mA max. —Standby current, 1mA max.
The device can be used as a three-terminal
• High reliability
potentiometer or as a two-terminal variable resistor in
—Endurance, 100,000 data changes per bit
a wide variety of applications including:
—Register data retention, 100 years
– control
• RTOTAL values = 10k
Ω,
50k
Ω,
and 100k
Ω
• Packages
– parameter adjustments
—8-lead SOIC and DIP
– signal processing
BLOCK DIAGRAM
U/D 7-Bit 99 RH/VH INC Up/Down VCC (Supply Voltage) CS Counter 98 97 Up/Down RH/VH (U/D) 7-Bit 96 Control Nonvolatile One Increment and RW/VW Memory of (INC) One Memory Transfer Resistor Hundred Device Select Gates Decoder Array (CS) RL/VL 2 Store and VSS (Ground) Recall 1 VCC Control V
General
SS Circuitry 0 RL/VL RW/VW
Detailed
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
®
Terminal Voltage 0V to +15V, 100 Taps NOT RECOMMENDED FOR NEW DESIGNS Data Sheet March 15, 2005 FN8176.0 NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc Digitally Controlled Potentiometer DESCRIPTION (XDCP™)
The Intersil X9312 is a digitally controlled potentiometer (XDCP). The device consists of a
FEATURES
resistor array, wiper switches, a control section, and
• Solid-state potentiometer
nonvolatile memory. The wiper position is controlled
• 3-wire serial interface
by a 3-wire interface.
• Terminal voltage, 0 to +15V
The potentiometer is implemented by a resistor array
• 100 wiper tap points
composed of 99 resistive elements and a wiper
—Wiper position stored in nonvolatile memory
switching network. Between each element and at
and recalled on power-up
either end are tap points accessible to the wiper
• 99 resistive elements
terminal. The position of the wiper element is
—Temperature compensated
controlled by the CS, U/D, and INC inputs. The
—End to end resistance range ± 20%
position of the wiper can be stored in nonvolatile
• Low power CMOS
memory and then be recalled upon a subsequent
—VCC = 5V
power-up operation.
—Active current, 3mA max. —Standby current, 1mA max.
The device can be used as a three-terminal
• High reliability
potentiometer or as a two-terminal variable resistor in
—Endurance, 100,000 data changes per bit
a wide variety of applications including:
—Register data retention, 100 years
– control
• RTOTAL values = 10k
Ω,
50k
Ω,
and 100k
Ω
• Packages
– parameter adjustments
—8-lead SOIC and DIP
– signal processing
BLOCK DIAGRAM
U/D 7-Bit 99 RH/VH INC Up/Down VCC (Supply Voltage) CS Counter 98 97 Up/Down RH/VH (U/D) 7-Bit 96 Control Nonvolatile One Increment and RW/VW Memory of (INC) One Memory Transfer Resistor Hundred Device Select Gates Decoder Array (CS) RL/VL 2 Store and VSS (Ground) Recall 1 VCC Control V
General
SS Circuitry 0 RL/VL RW/VW
Detailed
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.