X9418 Datasheet (Renesas) - 4

link to page 5 X9418 The X9418 will respond with an acknowledge after Once the stop condition is issued to indicate the end of recognition of a start condition and its slave address and the nonvolatile write command the X9418 initiates the once again after successful receipt of the command internal write cycle. ACK polling can be initiated byte. If the command is followed by a data byte the immediately. This involves issuing the start condition X9418 will respond with a final acknowledge. followed by the device slave address. If the X9418 is still busy with the write operation no ACK will be returned. If
Array Description
the X9418 has completed the write operation an ACK The X9418 is comprised of two resistor arrays. Each will be returned, and the master can then proceed with array contains 63 discrete resistive segments that are the next operation. connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical
Flow 1. ACK Polling Sequence
potentiometer (VH/RH and VL/RL inputs). At both ends of each array and between each resistor Nonvolatile Write segment is a CMOS switch connected to the wiper Command Completed Enter ACK Polling (VW/RW) output. Within each individual array only one switch may be turned on at a time. These switches are controlled by the Wiper Counter Register (WCR). The Issue six bits of the WCR are decoded to select, and enable, START one of sixty-four switches. The WCR may be written directly, or it can be changed Issue Slave by transferring the contents of one of four associated Address Issue STOP Data Registers into the WCR. These Data Registers and the WCR can be read and written by the host system. ACK NO
Device Addressing
Returned? Following a start condition the master must output the YES address of the slave it is accessing. The most significant four bits of the slave address are the device type NO identifier (refer to Figure 1 below). For the X9418 this is Further Operation? fixed as 0101[B]. YES
Figure 1. Slave Address
Issue Device Type Issue STOP Instruction Identifier 0 1 0 1 A3 A2 A1 A0 Proceed Proceed Device Address
Instruction Structure
The next four bits of the slave address are the device The next byte sent to the X9418 contains the instruction address. The physical device address is defined by the and register pointer information. The four most significant state of the A bits are the instruction. The next four bits point to one of 0 - A3 inputs. The X9418 compares the serial data stream with the address input state; a the two pots and when applicable they point to one of successful compare of all four address bits is required four associated registers. The format is shown Figure 2. for the X9418 to respond with an acknowledge. The A0 - A3 inputs can be actively driven by CMOS input signals or tied to VCC or VSS.
Acknowledge Polling
The disabling of the inputs, during the internal nonvolatile write operation, can be used to take advantage of the typical 5ms EEPROM write cycle time. FN8194 Rev 2.00 Page 4 of 20 October 12, 2006