Datasheet BSS138 (ON Semiconductor)
| Fabricante | ON Semiconductor |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Páginas / Página | 5 / 1 — B SS138. BSS138 N-Channel Logic Level Enhancement Mode Field Effect … |
| Revisión | 3 |
| Formato / tamaño de archivo | PDF / 188 Kb |
| Idioma del documento | Inglés |
B SS138. BSS138 N-Channel Logic Level Enhancement Mode Field Effect Transistor. General Description. Features. SOT-23
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B SS138 BSS138 N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features
These N-Channel enhancement mode field effect transistors are produced using ON • 0.22 A, 50 V. R Semicondcutor DS(ON) = 3.5Ω @ VGS = 10 V ’s proprietary, high cell density, DMOS technology. These products have been designed to RDS(ON) = 6.0Ω @ VGS = 4.5 V minimize on-state resistance while provide rugged, • High density cell design for extremely low RDS(ON) reliable, and fast switching performance.These products are particularly suited for low voltage, low • Rugged and Reliable current applications such as small servo motor • Compact industry standard SOT-23 surface mount control, power MOSFET gate drivers, and other package switching applications.
D
D
S
G S
G SOT-23 Absolute Maximum Ratings
TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 50 V VGSS Gate-Source Voltage ±20 V ID Drain Current – Continuous (Note 1) 0.22 A – Pulsed 0.88 P Maximum Power Dissipation (Note 1) 0.36 D W Derate Above 25°C 2.8 mW/°C TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C Maximum Lead Temperature for Soldering TL 300 °C Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 350 °C/W
Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity
SS BSS138 7’’ 8mm 3000 units 2005 Semiconductor Components Industries, LLC. Publication Order Number: September-2017, Rev. 3 BSS138/D
These N-Channel enhancement mode field effect transistors are produced using ON • 0.22 A, 50 V. R Semicondcutor DS(ON) = 3.5Ω @ VGS = 10 V ’s proprietary, high cell density, DMOS technology. These products have been designed to RDS(ON) = 6.0Ω @ VGS = 4.5 V minimize on-state resistance while provide rugged, • High density cell design for extremely low RDS(ON) reliable, and fast switching performance.These products are particularly suited for low voltage, low • Rugged and Reliable current applications such as small servo motor • Compact industry standard SOT-23 surface mount control, power MOSFET gate drivers, and other package switching applications.
D
D
S
G S
G SOT-23 Absolute Maximum Ratings
TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 50 V VGSS Gate-Source Voltage ±20 V ID Drain Current – Continuous (Note 1) 0.22 A – Pulsed 0.88 P Maximum Power Dissipation (Note 1) 0.36 D W Derate Above 25°C 2.8 mW/°C TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C Maximum Lead Temperature for Soldering TL 300 °C Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 350 °C/W
Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity
SS BSS138 7’’ 8mm 3000 units 2005 Semiconductor Components Industries, LLC. Publication Order Number: September-2017, Rev. 3 BSS138/D