Datasheet LT1185 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Low Dropout Regulator |
| Páginas / Página | 16 / 9 — APPLICATIO S I FOR ATIO. Shutdown Techniques. Output Overshoot. 5V Logic, … |
| Formato / tamaño de archivo | PDF / 188 Kb |
| Idioma del documento | Inglés |
APPLICATIO S I FOR ATIO. Shutdown Techniques. Output Overshoot. 5V Logic, Positive Regulated Output
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LT1185
U U W U APPLICATIO S I FOR ATIO
for remote sense applications, they may need to be con- to 400Hz rectified AC inputs because parasitic resistance sidered. Ground lead resistance of 0.4Ω would cause an and inductance will limit rate of rise even if the power output voltage error of up to (3A/40)(0.4Ω) = 30mV, or switch is closed at the peak of the AC line voltage. This 0.6% at VOUT = 5V. Note that if the sense leads are assumes that the switch is in the AC portion of the circuit. connected as shown in Figure 2, with ra ≈ 0Ω, this error is If instead, a switch is placed directly in the regulator input a fixed number of millivolts, and does not increase as a so that a large filter capacitor is precharged, fast input slew function of DC output voltage. rates will occur on switch closure. The output of the regulator will slew at a rate set by current limit and output
Shutdown Techniques
capacitor size; dVdt = ILIM/COUT. With ILIM = 3.6A and COUT The LT1185 can be shut down by open-circuiting the REF = 2.2µF, the output will slew at 1.6V/µs and overshoot can pin. The current flowing into this pin must be less than occur. This overshoot can be reduced to a few hundred 0.4µA to guarantee shutdown. Figure 3 details several millivolts or less by increasing the output capacitor to ways to create the “open” condition, with various logic 10µF and/or reducing current limit so that output slew rate levels. For variations on these schemes, simply remember is held below 0.5V/µs. that the voltage on the REF pin is 2.4V negative with A second possibility for creating output overshoot is respect to the ground pin. recovery from an output short. Again, the output slews at a rate set by current limit and output capacitance. To avoid
Output Overshoot
overshoot, the ratio ILIM/COUT should be less than Very high input voltage slew rate during start-up may 0.5 × 106. Remember that load capacitance can be added cause the LT1185 output to overshoot. Up to 20% over- to COUT for this calculation. Many loads will have multiple shoot could occur with input voltage ramp-up rate exceed- supply bypass capacitors that total more than COUT. ing 1V/µs. This condition cannot occur with normal 50Hz
5V Logic, Positive Regulated Output 5V Logic, Negative Regulated Output
5V 5V + + VOUT R † LIM R1 4k * “HI” = OUTPUT “OFF” REF GND + 3 EA 1N4148 Q1 FB 2N3906 R5 Q1 LT1185 V R2 2N3906 IN 300k R4 V R OUT LIM 33k VIN REF GND FB LT1185 • F3a R7 R6 VIN – V LT1185 IN 2.4k† 30k *CMOS LOGIC – †FOR HIGHER VALUES OF RLIM, MAKE R7 = (RLIM)(0.6) VOUT LT1185 • F03b
Figure 3. Shutdown Techniques
1185ff 9
U U W U APPLICATIO S I FOR ATIO
for remote sense applications, they may need to be con- to 400Hz rectified AC inputs because parasitic resistance sidered. Ground lead resistance of 0.4Ω would cause an and inductance will limit rate of rise even if the power output voltage error of up to (3A/40)(0.4Ω) = 30mV, or switch is closed at the peak of the AC line voltage. This 0.6% at VOUT = 5V. Note that if the sense leads are assumes that the switch is in the AC portion of the circuit. connected as shown in Figure 2, with ra ≈ 0Ω, this error is If instead, a switch is placed directly in the regulator input a fixed number of millivolts, and does not increase as a so that a large filter capacitor is precharged, fast input slew function of DC output voltage. rates will occur on switch closure. The output of the regulator will slew at a rate set by current limit and output
Shutdown Techniques
capacitor size; dVdt = ILIM/COUT. With ILIM = 3.6A and COUT The LT1185 can be shut down by open-circuiting the REF = 2.2µF, the output will slew at 1.6V/µs and overshoot can pin. The current flowing into this pin must be less than occur. This overshoot can be reduced to a few hundred 0.4µA to guarantee shutdown. Figure 3 details several millivolts or less by increasing the output capacitor to ways to create the “open” condition, with various logic 10µF and/or reducing current limit so that output slew rate levels. For variations on these schemes, simply remember is held below 0.5V/µs. that the voltage on the REF pin is 2.4V negative with A second possibility for creating output overshoot is respect to the ground pin. recovery from an output short. Again, the output slews at a rate set by current limit and output capacitance. To avoid
Output Overshoot
overshoot, the ratio ILIM/COUT should be less than Very high input voltage slew rate during start-up may 0.5 × 106. Remember that load capacitance can be added cause the LT1185 output to overshoot. Up to 20% over- to COUT for this calculation. Many loads will have multiple shoot could occur with input voltage ramp-up rate exceed- supply bypass capacitors that total more than COUT. ing 1V/µs. This condition cannot occur with normal 50Hz
5V Logic, Positive Regulated Output 5V Logic, Negative Regulated Output
5V 5V + + VOUT R † LIM R1 4k * “HI” = OUTPUT “OFF” REF GND + 3 EA 1N4148 Q1 FB 2N3906 R5 Q1 LT1185 V R2 2N3906 IN 300k R4 V R OUT LIM 33k VIN REF GND FB LT1185 • F3a R7 R6 VIN – V LT1185 IN 2.4k† 30k *CMOS LOGIC – †FOR HIGHER VALUES OF RLIM, MAKE R7 = (RLIM)(0.6) VOUT LT1185 • F03b
Figure 3. Shutdown Techniques
1185ff 9