Datasheet ADP7183 (Analog Devices) - 5

Data Sheet ADP7183 ABSOLUTE MAXIMUM RATINGS
temperature (TJ) of the device is dependent on the ambient
Table 3.
temperature (TA), the power dissipation of the device (PD), and
Parameter Rating
the junction to ambient thermal resistance of the package (θJA). VIN to GND +0.3 V to −6 V VOUT to GND +0.3 V to −V Use the fol owing equation to calculate the junction temperature IN (T EN to GND +5.0 V to −6 V J) from the ambient temperature (TA) and power dissipation (PD): VA to GND +0.3 V to −6 V TJ = TA + (PD × θJA) VAFB to GND +0.3 V to −6 V The junction to ambient thermal resistance (θJA) of the package VREG to GND +0.3 V to −2.16 V is based on modeling and calculation using a 4-layer board. The SENSE to GND +0.3 V to −6 V junction to ambient thermal resistance is highly dependent on Storage Temperature Range −65°C to +150°C the application and board layout. In applications where high Operating Junction Temperature Range −40°C to +125°C maximum power dissipation exists, close attention to thermal Soldering Conditions JEDEC J-STD-020 board design is required. The θJA value may vary, depending on Stresses at or above those listed under Absolute Maximum the PCB material, layout, and environmental conditions. The Ratings may cause permanent damage to the product. This is a specified θJA values are based on a 4-layer, 4 in. × 3 in. circuit board. stress rating only; functional operation of the product at these
THERMAL RESISTANCE
or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond Thermal performance is directly linked to printed circuit board the maximum operating conditions for extended periods may (PCB) design and operating environment. Careful attention to affect product reliability. PCB thermal design is required.
THERMAL DATA Table 4. Thermal Resistance
Absolute maximum ratings apply individually only, not in
Package Type θJA θJC Unit
combination. The ADP7183 can be damaged when the junction CP-8-271 68.8 10.0 °C/W temperature limits are exceeded. Monitoring ambient temperature 1 Thermal impedance simulated values are based on JEDEC 2S2P thermal test board with four thermal vias. See JEDEC JESD51. does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor
ESD CAUTION
thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction Rev. B | Page 5 of 19 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION ENABLE PIN OPERATION START-UP TIME APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor CA and CAFB Capacitors Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE