Datasheet LTC3858-2 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Low IQ, Dual 2-Phase Synchronous Step-Down Controller |
| Páginas / Página | 40 / 8 — PIN FUNCTIONS. SENSE1–, SENSE2– (Pin 1, Pin 9):. PLLIN/MODE (Pin 5):. … |
| Formato / tamaño de archivo | PDF / 448 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. SENSE1–, SENSE2– (Pin 1, Pin 9):. PLLIN/MODE (Pin 5):. FREQ (Pin 2):. PHASMD (Pin 3):
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LTC3858-2
PIN FUNCTIONS SENSE1–, SENSE2– (Pin 1, Pin 9):
The (–) Input to the
PLLIN/MODE (Pin 5):
External Synchronization Input to Differential Current Comparators. When greater than Phase Detector and Forced Continuous Mode Input. When INTVCC – 0.5V, the SENSE– pin supplies current to the an external clock is applied to this pin, the phase-locked current comparator. loop will force the rising TG1 signal to be synchronized with the rising edge of the external clock. When not syn-
FREQ (Pin 2):
The Frequency Control Pin for the Internal chronizing to an external clock, this input, which acts on Voltage-Controlled Oscillator (VCO). Connecting this pin both controllers, determines how the LTC3858-2 operates to GND forces the VCO to a fixed low frequency of 350kHz. at light loads. Pulling this pin to ground selects Burst Mode Connecting this pin to INTVCC forces the VCO to a fixed high operation. An internal 100k resistor to ground also invokes frequency of 535kHz. Other frequencies between 50kHz Burst Mode operation when the pin is floated. Tying this pin and 900kHz can be programmed using a resistor between to INTV FREQ and GND. An internal 20μA pull-up current develops CC forces continuous inductor current operation. Tying this pin to a voltage greater than 1.2V and less than the voltage to be used by the VCO to control the frequency INTVCC – 1.3V selects pulse-skipping operation.
PHASMD (Pin 3):
Control input to phase selector which
SGND (Pin 6, Exposed Pad Pin 33):
Small-signal ground determines the phase relationships between controller 1, common to both controllers, must be routed separately controller 2 and the CLKOUT signal. Pulling this pin to from high current grounds to the common (–) terminals ground forces TG2 and CLKOUT to be out of phase 180° of the C and 60° with respect to TG1. Connecting this pin to IN- IN capacitors. The exposed pad must be soldered to the PCB for rated thermal performance. TVCC forces TG2 and CLKOUT to be out of phase 240° and 120° with respect to TG1. Floating this pin forces TG2 and
RUN1, RUN2 (Pin 7, Pin 8):
Digital Run Control Inputs for CLKOUT to be out of phase 180° and 90° with respect to Each Controller. Forcing either of these pins below 1.2V TG1. Refer to the Table 1. shuts down that controller. Forcing both of these pins below 0.7V shuts down the entire LTC3858-2, reducing
CLKOUT (Pin 4):
Output clock signal available to daisy- quiescent current to approximately 8μA. chain other controller ICs for additional MOSFET driver stages/phases. The output levels swing from INTVCC to
ILIM (Pin 28):
Current Comparator Sense Voltage Range ground. Inputs. Tying this pin to SGND, FLOAT or INTVCC sets the maximum current sense threshold to one of three different levels for both comparators. 38582f 8
PIN FUNCTIONS SENSE1–, SENSE2– (Pin 1, Pin 9):
The (–) Input to the
PLLIN/MODE (Pin 5):
External Synchronization Input to Differential Current Comparators. When greater than Phase Detector and Forced Continuous Mode Input. When INTVCC – 0.5V, the SENSE– pin supplies current to the an external clock is applied to this pin, the phase-locked current comparator. loop will force the rising TG1 signal to be synchronized with the rising edge of the external clock. When not syn-
FREQ (Pin 2):
The Frequency Control Pin for the Internal chronizing to an external clock, this input, which acts on Voltage-Controlled Oscillator (VCO). Connecting this pin both controllers, determines how the LTC3858-2 operates to GND forces the VCO to a fixed low frequency of 350kHz. at light loads. Pulling this pin to ground selects Burst Mode Connecting this pin to INTVCC forces the VCO to a fixed high operation. An internal 100k resistor to ground also invokes frequency of 535kHz. Other frequencies between 50kHz Burst Mode operation when the pin is floated. Tying this pin and 900kHz can be programmed using a resistor between to INTV FREQ and GND. An internal 20μA pull-up current develops CC forces continuous inductor current operation. Tying this pin to a voltage greater than 1.2V and less than the voltage to be used by the VCO to control the frequency INTVCC – 1.3V selects pulse-skipping operation.
PHASMD (Pin 3):
Control input to phase selector which
SGND (Pin 6, Exposed Pad Pin 33):
Small-signal ground determines the phase relationships between controller 1, common to both controllers, must be routed separately controller 2 and the CLKOUT signal. Pulling this pin to from high current grounds to the common (–) terminals ground forces TG2 and CLKOUT to be out of phase 180° of the C and 60° with respect to TG1. Connecting this pin to IN- IN capacitors. The exposed pad must be soldered to the PCB for rated thermal performance. TVCC forces TG2 and CLKOUT to be out of phase 240° and 120° with respect to TG1. Floating this pin forces TG2 and
RUN1, RUN2 (Pin 7, Pin 8):
Digital Run Control Inputs for CLKOUT to be out of phase 180° and 90° with respect to Each Controller. Forcing either of these pins below 1.2V TG1. Refer to the Table 1. shuts down that controller. Forcing both of these pins below 0.7V shuts down the entire LTC3858-2, reducing
CLKOUT (Pin 4):
Output clock signal available to daisy- quiescent current to approximately 8μA. chain other controller ICs for additional MOSFET driver stages/phases. The output levels swing from INTVCC to
ILIM (Pin 28):
Current Comparator Sense Voltage Range ground. Inputs. Tying this pin to SGND, FLOAT or INTVCC sets the maximum current sense threshold to one of three different levels for both comparators. 38582f 8