Datasheet LTC3617 (Analog Devices) - 7

FabricanteAnalog Devices
Descripción±6A Monolithic Synchronous Step-Down Regulator for DDR Termination
Páginas / Página20 / 7 — pin Functions. RT (Pin 1):. SYNC (Pin 20):. PGOOD (Pin 21):. SGND (Pin …
Formato / tamaño de archivoPDF / 487 Kb
Idioma del documentoInglés

pin Functions. RT (Pin 1):. SYNC (Pin 20):. PGOOD (Pin 21):. SGND (Pin 2):. VTTR (Pin 3):. PVIN (Pins 4, 10, 11, 17):. VFB (Pin 22):

pin Functions RT (Pin 1): SYNC (Pin 20): PGOOD (Pin 21): SGND (Pin 2): VTTR (Pin 3): PVIN (Pins 4, 10, 11, 17): VFB (Pin 22):

Línea de modelo para esta hoja de datos

Versión de texto del documento

LTC3617
pin Functions RT (Pin 1):
Oscillator Frequency. This pin provides two
SYNC (Pin 20):
External Synchronization Input. When ways of setting the constant switching frequency: a clock signal is applied to this pin, the switching fre- 1. Connecting a resistor from RT to ground will set the quency synchronizes to this clock signal. This pin can switching frequency based on the resistor value. be either floating or tied to ground if an external clock is not being used. 2. Tying the RT pin to SVIN enables the internal 2.25MHz oscillator frequency.
PGOOD (Pin 21):
Power Good. This open-drain output is pulled down to SGND on start-up and when the FB
SGND (Pin 2):
Signal Ground. All small-signal and com- voltage is outside the power good voltage window. If the pensation components should connect to this ground, FB voltage increases and stays inside the power good which in turn should connect to PGND at a single point. window for more than 100µs the PGOOD pin is released.
VTTR (Pin 3):
Voltage Buffer Output. This pin is the output If the FB voltage leaves the power good window for more of an internal voltage buffer whose voltage is equal to than 100µs the PGOOD pin is pulled low. VDDQIN • 0.5. Output current capability is ±10mA. VTTR The power good window moves in relation to the VDDQIN is also the reference voltage of the error amplifier, which pin voltage. In shutdown the PGOOD output will actively sets the output voltage. VFB will regulate to VTTR. Do not pull low and may be used to discharge the output capaci- exceed 0.1µF capacitance on this pin. tors via an external resistor.
PVIN (Pins 4, 10, 11, 17):
Power Input Supply. PVIN con-
VFB (Pin 22):
Voltage Feedback Input Pin. Senses the nects to the source of the internal P-channel power MOSFET. feedback voltage from the external resistive divider across This pin is independent of SVIN and may be connected to the output. the same supply or to a lower voltage.
ITH (Pin 23):
Error Amplifier Compensation. The current
SW (Pins 5, 6, 7, 8, 13, 14, 15, 16):
Switch Node. Con- comparator’s threshold increases with this control voltage. nection to the inductor. These pins connect to the drains Tying this pin to SVIN enables internal compensation. of the internal power MOSFET switches.
VDDQIN (Pin 24):
External Reference Input. An internal
NC (Pins 9, 12):
Can be connected to ground or left open. resistor divider sets the VTTR and VFB regulated voltages
SV
to be equal to half the voltage applied to this input.
IN (Pin 18):
Signal Input Supply. This pin powers the internal control circuitry and is monitored by the under-
PGND (Exposed Pad Pin 25):
Power Ground. This pin voltage lockout comparator. connects to the source of the internal N-channel power
RUN (Pin 19):
Enable Input. Pulling this pin high enables MOSFET. This pin should be connected close to the (–) the LTC3617 and forcing it to ground shuts the regulator terminal of CIN and COUT. down. In shutdown, all functions are disabled and the chip draws <1µA of supply current. 3617fa 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts