Datasheet LT1374 (Analog Devices) - 7

LT1374
U U U PI FU CTIO S SYNC:
(Excludes T7 package) The sync pin is used to used for frequency compensation, but can do double duty synchronize the internal oscillator to an external signal. It as a current clamp or control loop override. This pin sits is directly logic compatible and can be driven with any at about 1V for very light loads and 2V at maximum load. signal between 10% and 90% duty cycle. The synchroniz- It can be driven to ground to shut off the regulator, but if ing range is equal to initial operating frequency, up to driven high, current must be limited to 4mA. 1MHz. This pin replaces SHDN on -SYNC option parts. See
BIAS:
(SO-8 and FE16 Packages) The BIAS pin is used to Synchronizing section in Applications Information for improve efficiency when operating at higher input volt- details. ages and light load current. Connecting this pin to the
SHDN:
The shutdown pin is used to turn off the regulator regulated output voltage forces most of the internal cir- and to reduce input drain current to a few microamperes. cuitry to draw its operating current from the output voltage Actually, this pin has two separate thresholds, one at rather than the input supply. This is a much more efficient 2.38V to disable switching, and a second at 0.4V to force way of doing business if the input voltage is much higher complete micropower shutdown. The 2.38V threshold than the output. Minimum output voltage setting for this functions as an accurate undervoltage lockout (UVLO). mode of operation is 3.3V. Efficiency improvement at This can be used to prevent the regulator from operating VIN = 20V, VOUT = 5V, and IOUT = 25mA is over 10%. until the input voltage has reached a predetermined level.
NC:
No Connect. Leave floating or solder to any node.
VC:
The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally
W BLOCK DIAGRA
The LT1374 is a constant frequency, current mode buck it much easier to frequency compensate the feedback loop converter. This means that there is an internal clock and and also gives much quicker transient response. two feedback loops that control the duty cycle of the power Most of the circuitry of the LT1374 operates from an switch. In addition to the normal error amplifier, there is a internal 2.9V bias line. The bias regulator normally draws current sense amplifier that monitors switch current on a power from the regulator input pin, but if the BIAS pin is cycle-by-cycle basis. A switch cycle starts with an oscilla- connected to an external voltage higher than 3V, bias tor pulse which sets the RS flip-flop to turn the switch on. power will be drawn from the external source (typically the When switch current reaches a level set by the inverting regulated output voltage). This will improve efficiency if input of the comparator, the flip-flop is reset and the the BIAS pin voltage is lower than regulator input voltage. switch turns off. Output voltage control is obtained by using the output of the error amplifier to set the switch High switch efficiency is attained by using the BOOST pin current trip point. This technique means that the error to provide a voltage to the switch driver which is higher amplifier commands current to be delivered to the output than the input voltage, allowing the switch to saturate. This rather than voltage. A voltage fed system will have low boosted voltage is generated with an external capacitor phase shift up to the resonant frequency of the inductor and diode. Two comparators are connected to the shut- and output capacitor, then an abrupt 180 down pin. One has a 2.38V threshold for undervoltage ° shift will occur. The current fed system will have 90 lockout and the second has a 0.4V threshold for complete ° phase shift at a much lower frequency, but will not have the additional 90 shutdown. ° shift until well beyond the LC resonant frequency. This makes 1374fd 7