Datasheet LTC1627 (Analog Devices) - 6

LTC1627
U OPERATIO (Refer to Functional Diagram) Main Control Loop
output load exceeds 100mA. The threshold voltage be- tween Burst Mode operation and forced continuous mode The LTC1627 uses a constant frequency, current mode is 0.8V. This can be used to assist in secondary winding step-down architecture. Both the main and synchronous regulation as described in Auxiliary Winding Control Using switches, consisting of top P-channel and bottom SYNC/FCB Pin in the Applications Information section. N-channel power MOSFETs, are internal. During normal operation, the internal top power MOSFET is turned on When the converter is in Burst Mode operation, the peak each cycle when the oscillator sets the RS latch, and current of the inductor is set to approximately 200mA, turned off when the current comparator, ICOMP, resets the even though the voltage at the ITH pin indicates a lower RS latch. The peak inductor current at which ICOMP resets value. The voltage at the ITH pin drops when the inductor’s the RS latch is controlled by the voltage on the ITH pin, average current is greater than the load requirement. As which is the output of error amplifier EA. The VFB pin, the ITH voltage drops below 0.12V, the BURST comparator described in the Pin Functions section, allows EA to trips, causing the internal sleep line to go high and turn off receive an output feedback voltage from an external resis- both power MOSFETs. tive divider. When the load current increases, it causes a In sleep mode, both power MOSFETs are held off and the slight decrease in the feedback voltage relative to the 0.8V internal circuitry is partially turned off, reducing the quies- reference, which, in turn, causes the ITH voltage to in- cent current to 200µA. The load current is now being crease until the average inductor current matches the new supplied from the output capacitor. When the output load current. While the top MOSFET is off, the bottom voltage drops, causing I MOSFET is turned on until either the inductor current TH to rise above 0.22V, the top MOSFET is again turned on and this process repeats. starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next cycle.
Short-Circuit Protection
The main control loop is shut down by pulling the RUN/SS When the output is shorted to ground, the frequency of the pin low. Releasing RUN/SS allows an internal 2.25µA oscillator is reduced to about 35kHz, 1/10 the nominal current source to charge soft-start capacitor CSS. When frequency. This frequency foldback ensures that the CSS reaches 0.7V, the main control loop is enabled with the inductor current has more time to decay, thereby prevent- ITH voltage clamped at approximately 5% of its maximum ing runaway. The oscillator’s frequency will progressively value. As CSS continues to charge, ITH is gradually increase to 350kHz (or the synchronized frequency) when released, allowing normal operation to resume. VFB rises above 0.3V. Comparator OVDET guards against transient overshoots > 7.5% by turning the main switch off and turning the
Frequency Synchronization
synchronous switch on. With the synchronous switch The LTC1627 can be synchronized with an external turned on, the output is crowbarred. This may cause a TTL/CMOS compatible clock signal. The frequency range large amount of current to flow from VIN if the main switch of this signal must be from 385kHz to 525kHz. Do not is damaged, blowing the system fuse. attempt to synchronize the LTC1627 below 385kHz as this may cause abnormal operation and an undesired fre-
Burst Mode Operation
quency spectrum. The top MOSFET turn-on follows the The LTC1627 is capable of Burst Mode operation in which rising edge of the external source. the internal power MOSFETs operate intermittently based When the LTC1627 is clocked by an external source, Burst on load demand. To enable Burst Mode operation, simply Mode operation is disabled; the LTC1627 then operates in allow the SYNC/FCB pin to float or connect it to a logic PWM pulse skipping mode. In this mode, when the output high. To disable Burst Mode operation and enable forced load is very low, current comparator ICOMP remains tripped continuous mode, connect the SYNC/FCB pin to GND. In for more than one cycle and forces the main switch to stay this mode, the efficiency is lowest at light loads, but off for the same number of cycles. Increasing the output becomes comparable to Burst Mode operation when the 6