Datasheet LTC3414 (Analog Devices) - 9

LTC3414
U U W U APPLICATIO S I FOR ATIO CIN and COUT Selection
applications provided that consideration is given to ripple The input capacitance, C current ratings and long term reliability. Ceramic capaci- IN, is needed to filter the trapezoi- dal wave current at the source of the top MOSFET. To tors have excellent low ESR characteristics but can have a prevent large voltage transients from occurring, a low ESR high voltage coefficient and audible piezoelectric effects. input capacitor sized for the maximum RMS current The high Q of ceramic capacitors with trace inductance should be used. The maximum RMS current is given by: can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
V V I = I OUT IN RMS OUT MAX ( ) – 1 V V Higher values, lower cost ceramic capacitors are now IN OUT becoming available in smaller case sizes. Their high ripple This formula has a maximum at VIN = 2VOUT, where current, high voltage rating and low ESR make them ideal IRMS = IOUT/2. This simple worst-case condition is com- for switching regulator applications. However, care must monly used for design because even significant deviations be taken when these capacitors are used at the input and do not offer much relief. Note that ripple current ratings output. When a ceramic capacitor is used at the input and from capacitor manufacturers are often based on only the power is supplied by a wall adapter through long wires, 2000 hours of life which makes it advisable to further a load step at the output can induce ringing at the input, derate the capacitor, or choose a capacitor rated at a VIN. At best, this ringing can couple to the output and be higher temperature than required. Several capacitors may mistaken as loop instability. At worst, a sudden inrush of also be paralleled to meet size or height requirements in current through the long wires can potentially cause a the design. For low input voltage applications, sufficient voltage spike at VIN large enough to damage the part. bulk input capacitance is needed to minimize transient When choosing the input and output ceramic capacitors, effects during output load changes. choose the X5R or X7R dielectric formulations. These The selection of COUT is determined by the effective series dielectrics have the best temperature and voltage charac- resistance (ESR) that is required to minimize voltage teristics of all the ceramics for a given value and size. ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the
Output Voltage Programming
control loop is stable. Loop stability can be checked by The output voltage is set by an external resistive divider viewing the load transient response as described in a later according to the following equation: section. The output ripple, ΔVOUT, is determined by: ⎛ R2⎞ ⎛ ⎞ V 0. V OUT = 8 1+ Δ 1 ⎝⎜ ⎠⎟ V R1 OUT ≤ ΔI ESR L + ⎝⎜ fC 8 OUT ⎠⎟ The resistive divider allows pin VFB to sense a fraction of The output ripple is highest at maximum input voltage the output voltage as shown in Figure 2. since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS VOUT current handling requirements. Dry tantalum, special poly- R2 mer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. Special polymer VFB capacitors offer very low ESR but have lower capacitance LTC3414 R1 density than other types. Tantalum capacitors have the SGND highest capacitance density but it is important to only use 3414 F02 types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have
Figure 2. Setting the Output Voltage
significantly higher ESR, but can be used in cost-sensitive 3414fb 9