Datasheet LTC3448 (Analog Devices) - 8

LTC3448
U OPERATIO (Refer to Functional Diagram)
the VOUT pin and both the main and synchronous switches Some applications may be able to anticipate the transition are turned off. The control loop is stabilized by the load from high to low and low to high load currents. In these capacitor and requires a minimum value of 2µF. The cases it may be desirable to switch between modes by LTC3448 will change back to switching mode and turn off controlling the MODE pin with a processor signal. In these the LDO when the load current exceeds approximately applications it is important that the MODE pin is pulled 11mA. high no earlier than 50µs after the RUN pin is pulled high. This will ensure proper start-up of internal reference When MODE is connected to an intermediate voltage level circuitry. (i.e., VOUT), this switchover is automatic. If MODE is pulled high to VIN, the LDO remains on and the switcher off The load current ILDO(ON) below which the switcher will regardless of the load current. The LDO is capable of automatically turn off and the LDO turn on is independent providing a maximum of approximately 15mA before the of the external capacitor, and to first order, independent load regulation will degrade to unacceptable levels. If of supply and output voltage. There is an inverse relation- MODE is pulled to GND, the switcher remains on and the ship between ILDO(ON) and the value of the inductor. LDO off regardless of the load current. These dependencies are shown in Figures 2 and 3. Automatic operation with inductor values below 1µH is not recommended. 4.5 4.0 VOUT = 1.2V At the low load currents at which the switcher to linear 3.5 regulator transition occurs, the switcher is operating in 3.0 VOUT = 1.5V pulse skipping mode. During each switching cycle in this (mA) 2.5 mode, while the synchronous switch (bottom MOSFET) is VOUT = 1.8V 2.0 on, the inductor current decays until the reverse current I LDO(ON) 1.5 comparator is triggered. At this occurrence, the bottom 1.0 MOSFET is turned off. Ideally, this occurs when the 0.5 TA = 25°C inductor current is precisely zero. In reality, because of on- L = 2.2µH 0 chip delays, this current will be negative at higher output 2 3 4 5 6 voltages. VIN (V) 3448 F02 The internal algorithm which controls the LDO turn-on
Figure 2. ILDO(ON) vs VIN, VOUT
load current level makes certain assumptions about the amount of charge transferred to the output on each 5.0 switching cycle. These assumptions are no longer met VIN = 3.6V 4.5 VOUT = 1.5V when the inductor current begins to reverse. This causes T 4.0 A = 25°C the load current at which the transition takes place to move 3.5 to lower levels at higher output voltages. For this reason 3.0 (mA) use of the LDO auto mode is not recommended for output 2.5 levels above 2V. For output voltages above 2V, the MODE 2.0 I LDO(ON) pin should be driven externally. 1.5 1.0
Short-Circuit Protection
0.5 0 When the output is shorted to ground, the main switch 0 2 4 6 8 10 12 INDUCTOR VALUE (µH) cycle will be skipped, and the synchronous switch will 3448 F03 remain on for a longer duration. This allows the inductor
Figure 3. ILDO(ON) vs LOUT
current more time to decay, thereby preventing runaway. 3448f 8