Datasheet LTC3407-4 (Analog Devices) - 9

LTC3407-4
APPLICATIONS INFORMATION
Panasonic Special Polymer (SP), and Kemet A700, of- to check loop stability over the operating temperature fer very low ESR, but have a lower capacitance density range. To minimize their large temperature and voltage than other types. Tantalum capacitors have the highest coeffi cients, only X5R or X7R ceramic capacitors should capacitance density, but they have a larger ESR and it be used. A good selection of ceramic capacitors is available is critical that the capacitors are surge tested for use in from Taiyo Yuden, AVX, Kemet, TDK, and Murata. switching power supplies. An excellent choice is the AVX Great care must be taken when using only ceramic input TPS series of surface mount tantalums, available in case and output capacitors. When a ceramic capacitor is used heights ranging from 2mm to 4mm. Aluminum electrolytic at the input and the power is being supplied through long capacitors have a signifi cantly larger ESR, and are often wires, such as from a wall adapter, a load step at the output used in extremely cost-sensitive applications provided that can induce ringing at the V consideration is given to ripple current ratings and long IN pin. At best, this ringing can couple to the output and be mistaken as loop instability. term reliability. Ceramic capacitors have the lowest ESR At worst, the ringing at the input can be large enough to and cost, but also have the lowest capacitance density, damage the part. a high voltage and temperature coeffi cient, and exhibit audible piezoelectric effects. In addition, the high Q of Since the ESR of a ceramic capacitor is so low, the input ceramic capacitors along with trace inductance can lead and output capacitor must instead fulfi ll a charge storage to signifi cant ringing. requirement. During a load step, the output capacitor must instantaneously supply the current to support the load In most cases, 0.1μF to 1μF of ceramic capacitors should until the feedback loop raises the switch current enough also be placed close to the LTC3407-4 in parallel with the to support the load. The time required for the feedback main capacitors for high frequency decoupling. loop to respond is dependent on the compensation and VIN the output capacitor size. Typically, 3-4 cycles are required 2.5V TO 5.5V CIN R5 to respond to a load step, but only in the fi rst cycle does RUN2 VIN RUN1 BM* MODE/SYNC POR POWER-ON the output drop linearly. The output droop, V PS* RESET DROOP, is LTC3407-4 L2 L1 usually about 2-3 times the linear drop of the fi rst cycle. VOUT2 SW2 SW1 VOUT1 C5 C4 Thus, a good place to start is with the output capacitor size of approximately: V V FB2 FB1 R4 R2 GND ΔI COUT2 R3 R1 COUT1 C OUT OUT ≈ 2.5 34074 F02 f • V O DROOP *MODE/SYNC = 0V: PULSE-SKIPPING MODE/SYNC = VIN: Burst Mode OPERATION More capacitance may be required depending on the duty
Figure 2. LTC3407-4 General Schematic
cycle and load step requirements.
Ceramic Input and Output Capacitors
In most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance Higher value, lower cost ceramic capacitors are now be- to the supply is very low. A 10μF ceramic capacitor is coming available in smaller case sizes. These are tempting usually enough for these conditions. for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop
Setting the Output Voltage
stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving The LTC3407-4 develops a 0.6V reference voltage be- acceptable loop phase margin. Ceramic capacitors remain tween the feedback pin, VFB, and the ground as shown in capacitive to beyond 300kHz and usually resonate with their Figure 2. The output voltage is set by a resistive divider ESL before ESR becomes effective. Also, ceramic caps are according to the following formula: prone to temperature effects which requires the designer 34074fa 9