Datasheet LTC3407A (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Dual Synchronous 600mA, 1.5MHz Step-Down DC/DC Regulator |
| Páginas / Página | 16 / 6 — PIN FUNCTIONS. SW2 (Pin 7):. POR (Pin 8):. VFB2 (Pin 10):. Exposed Pad … |
| Formato / tamaño de archivo | PDF / 296 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. SW2 (Pin 7):. POR (Pin 8):. VFB2 (Pin 10):. Exposed Pad (GND) (Pin 11):. RUN/SS2 (Pin 9):. BLOCK DIAGRAM
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LTC3407A
PIN FUNCTIONS SW2 (Pin 7):
Regulator 2 Switch Node Connection to the RC-Network with desired time-constant to enable soft-start Inductor. This pin swings from VIN to GND. feature. This pin must be driven; do not fl oat.
POR (Pin 8):
Power-On Reset. This common-drain logic
VFB2 (Pin 10):
Output Feedback. Receives the feedback output is pulled to GND when the output voltage is not voltage from the external resistive divider across the output. within ±8.5% of regulation and goes high after 216 clock Nominal voltage for this pin is 0.6V. cycles when both channels are within regulation.
Exposed Pad (GND) (Pin 11):
Power Ground. Connect to
RUN/SS2 (Pin 9):
Regulator 2 Enable and Soft-Start Input. the (–) terminal of COUT, and (–) terminal of CIN. Must be Forcing this pin to VIN enables regulator 2, while forcing it soldered to electrical ground on PCB. to GND causes regulator 2 to shut down. Connect external
BLOCK DIAGRAM
REGULATOR 1 MODE/SYNC 6 BURST CLAMP VIN SLOPE COMP 0.6V + ITH EN EA – SLEEP – + V 1 FB1 – 5Ω ICOMP 0.65V + BURST S Q RS LATCH R Q 0.55V – SWITCHING UV UVDET LOGIC AND + BLANKING ANTI CIRCUIT SHOOT- THRU 4 SW1 + OV OVDET 0.65V – + IRCMP SHUTDOWN – 11 GND VIN 3 V PGOOD1 IN 8 POR RUN/SS1 2 POR 0.6V REF OSC COUNTER RUN/SS2 9 OSC 5 GND PGOOD2 REGULATOR 2 (IDENTICAL TO REGULATOR 1) 7 SW2 V 10 FB2 3407afa 6
PIN FUNCTIONS SW2 (Pin 7):
Regulator 2 Switch Node Connection to the RC-Network with desired time-constant to enable soft-start Inductor. This pin swings from VIN to GND. feature. This pin must be driven; do not fl oat.
POR (Pin 8):
Power-On Reset. This common-drain logic
VFB2 (Pin 10):
Output Feedback. Receives the feedback output is pulled to GND when the output voltage is not voltage from the external resistive divider across the output. within ±8.5% of regulation and goes high after 216 clock Nominal voltage for this pin is 0.6V. cycles when both channels are within regulation.
Exposed Pad (GND) (Pin 11):
Power Ground. Connect to
RUN/SS2 (Pin 9):
Regulator 2 Enable and Soft-Start Input. the (–) terminal of COUT, and (–) terminal of CIN. Must be Forcing this pin to VIN enables regulator 2, while forcing it soldered to electrical ground on PCB. to GND causes regulator 2 to shut down. Connect external
BLOCK DIAGRAM
REGULATOR 1 MODE/SYNC 6 BURST CLAMP VIN SLOPE COMP 0.6V + ITH EN EA – SLEEP – + V 1 FB1 – 5Ω ICOMP 0.65V + BURST S Q RS LATCH R Q 0.55V – SWITCHING UV UVDET LOGIC AND + BLANKING ANTI CIRCUIT SHOOT- THRU 4 SW1 + OV OVDET 0.65V – + IRCMP SHUTDOWN – 11 GND VIN 3 V PGOOD1 IN 8 POR RUN/SS1 2 POR 0.6V REF OSC COUNTER RUN/SS2 9 OSC 5 GND PGOOD2 REGULATOR 2 (IDENTICAL TO REGULATOR 1) 7 SW2 V 10 FB2 3407afa 6