Datasheet LTC3545, LTC3545-1 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Triple 800mA Synchronous Step-Down Regulator - 2.25MHz |
| Páginas / Página | 20 / 7 — PIN FUNCTIONS. SW1 (Pin 1):. PGOOD3 (Pin 9, LTC3545-1 Only):. PGOOD1 (Pin … |
| Formato / tamaño de archivo | PDF / 305 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. SW1 (Pin 1):. PGOOD3 (Pin 9, LTC3545-1 Only):. PGOOD1 (Pin 2):. RUN2 (Pin 3):. RUN3 (Pin 10):. PGOOD2 (Pin 4):
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LTC3545/LTC3545-1
PIN FUNCTIONS SW1 (Pin 1):
Switch Node Connection to Inductor for external clock, the part operates in pulse skipping mode Regulator 1. This pin connects to the internal power with a switching frequency equal to the external clock. MOSFET switches.
PGOOD3 (Pin 9, LTC3545-1 Only):
This open-drain output
PGOOD1 (Pin 2):
This open-drain output voltage is pulled voltage is pulled to a logic low when VFB3 is below 0.54V to a logic low when VFB1 is below 0.54V (VOUT1 is below (VOUT3 is below 90% of regulated level). The LTC3545-1 90% of regulated level). operates in Burst Mode operation only.
RUN2 (Pin 3):
Regulator 2 Enable Pin. Apply a voltage
RUN3 (Pin 10):
Regulator 3 Enable Pin. Apply a voltage greater than VRUN(HIGH) to enable this regulator. greater than VRUN(HIGH) to enable this regulator.
PGOOD2 (Pin 4):
This open-drain output voltage is pulled
VFB3 (Pin 11):
Regulator 3 Feedback Pin. This pin receives to a logic low when VFB2 is below 0.54V (VOUT2 is below the feedback voltage from an external resistive divider 90% of regulated level). across the output.
SW2 (Pin 5):
Switch Node Connection to Inductor for
VFB2 (Pin 12):
Regulator 2 Feedback Pin. This pin receives Regulator 2. This pin connects to the internal power the feedback voltage from an external resistive divider MOSFET switches. across the output.
PGND (Pin 6):
Regulators 2 and 3 Power Path Return.
VFB1 (Pin 13):
Regulator 1 Feedback Pin. This pin receives the feedback voltage from an external resistive divider
PVIN (Pin 7):
Power Path Supply Pin for Regulators 2 and across the output. 3. This pin must be closely decoupled to PGND, with a 4.7μF or greater ceramic capacitor.
RUN1 (Pin 14):
Regulator 1 Enable Pin. Apply a voltage greater than V
SW3 (Pin 8):
Switch Node Connection to Inductor for RUN(HIGH) to enable this regulator. Regulator 3. This pin connects to the internal power
VIN (Pin 15):
Supply Pin for Internal Reference and Control MOSFET switches. Circuitry. Power path supply for regulator 1.
SYNC/MODE (Pin 9, LTC3545 Only):
Mode Select and
GNDA (Pin 16):
Ground Pin for Internal Reference and External Clock Input. When pulled low, part operates in Control Circuitry. Power path return for regulator 1. Burst Mode operation. When pulled high, part operates
Exposed Pad (Pin 17):
GND. Must be soldered to the in pulse skipping mode. When driven by a 1MHz to 3MHz PCB. 35451fb 7
PIN FUNCTIONS SW1 (Pin 1):
Switch Node Connection to Inductor for external clock, the part operates in pulse skipping mode Regulator 1. This pin connects to the internal power with a switching frequency equal to the external clock. MOSFET switches.
PGOOD3 (Pin 9, LTC3545-1 Only):
This open-drain output
PGOOD1 (Pin 2):
This open-drain output voltage is pulled voltage is pulled to a logic low when VFB3 is below 0.54V to a logic low when VFB1 is below 0.54V (VOUT1 is below (VOUT3 is below 90% of regulated level). The LTC3545-1 90% of regulated level). operates in Burst Mode operation only.
RUN2 (Pin 3):
Regulator 2 Enable Pin. Apply a voltage
RUN3 (Pin 10):
Regulator 3 Enable Pin. Apply a voltage greater than VRUN(HIGH) to enable this regulator. greater than VRUN(HIGH) to enable this regulator.
PGOOD2 (Pin 4):
This open-drain output voltage is pulled
VFB3 (Pin 11):
Regulator 3 Feedback Pin. This pin receives to a logic low when VFB2 is below 0.54V (VOUT2 is below the feedback voltage from an external resistive divider 90% of regulated level). across the output.
SW2 (Pin 5):
Switch Node Connection to Inductor for
VFB2 (Pin 12):
Regulator 2 Feedback Pin. This pin receives Regulator 2. This pin connects to the internal power the feedback voltage from an external resistive divider MOSFET switches. across the output.
PGND (Pin 6):
Regulators 2 and 3 Power Path Return.
VFB1 (Pin 13):
Regulator 1 Feedback Pin. This pin receives the feedback voltage from an external resistive divider
PVIN (Pin 7):
Power Path Supply Pin for Regulators 2 and across the output. 3. This pin must be closely decoupled to PGND, with a 4.7μF or greater ceramic capacitor.
RUN1 (Pin 14):
Regulator 1 Enable Pin. Apply a voltage greater than V
SW3 (Pin 8):
Switch Node Connection to Inductor for RUN(HIGH) to enable this regulator. Regulator 3. This pin connects to the internal power
VIN (Pin 15):
Supply Pin for Internal Reference and Control MOSFET switches. Circuitry. Power path supply for regulator 1.
SYNC/MODE (Pin 9, LTC3545 Only):
Mode Select and
GNDA (Pin 16):
Ground Pin for Internal Reference and External Clock Input. When pulled low, part operates in Control Circuitry. Power path return for regulator 1. Burst Mode operation. When pulled high, part operates
Exposed Pad (Pin 17):
GND. Must be soldered to the in pulse skipping mode. When driven by a 1MHz to 3MHz PCB. 35451fb 7