Datasheet LTC3603 (Analog Devices) - 9

LTC3603
operation
resistor should be chosen to correspond to a frequency
Overtemperature and PVIN Overvoltage Protection
that is 25% lower than the synchronization frequency. When using the LTC3603 in an application circuit, care When synchronized, the LTC3603 will operate in pulse- must be taken not to exceed any of the ratings specified skipping mode. in the Absolute Maximum Ratings section. As an added
Dropout Operation
safeguard, however, the LTC3603 does incorporate an overtemperature shutdown feature. If the junction When the input supply voltage decreases toward the output temperature reaches approximately 150°C, both power voltage, the duty cycle increases toward the maximum switches will be turned off and the SW node will become on-time. Further reduction of the supply voltage forces the high impedance. After the part has cooled to below top switch to remain on for more than one cycle until it 115°C, it will restart. Similarly, the LTC3603 contains an attempts to stay on continuously. In order to replenish the overvoltage shutdown feature that monitors the voltage on voltage on the floating BOOST supply capacitor, however, the PVIN pin. If this voltage exceeds approximately 16.5V, the top switch is forced off and the bottom switch is forced both power switches will be turned off until PVIN voltage on for approximately 85ns every sixteen clock cycles. This is reduced below 16V. achieves an effective duty cycle that can exceed 99%. The output voltage will then be primarily determined by the
Voltage Tracking and Soft-Start
input voltage minus the voltage drop across the upper Some microprocessors and DSP chips need two power internal N-channel MOSFET and the inductor. supplies with different voltage levels. These systems often
Slope Compensation and Inductor Peak Current
require voltage sequencing between the core power supply and the I/O power supply. Without proper sequencing, Slope compensation provides stability in constant- latch-up failure or excessive current draw may occur that frequency architectures by preventing subharmonic could result in damage to the processor’s I/O ports or the oscil ations at duty cycles greater than 50%. It is I/O ports of a supporting system device such as memory, accomplished internally by adding a compensating ramp to an FPGA or a data converter. To ensure that the I/O loads the inductor current signal at duty cycles in excess of 30%. are not driven until the core voltage is properly biased, Normally, the maximum inductor peak current is reduced tracking of the core supply and the I/O supply voltage is when slope compensation is added. In the LTC3603, necessary. however, slope compensation recovery is implemented to reduce the variation of the maximum inductor peak current Voltage tracking is enabled by applying a ramp voltage to (and therefore the maximum available output current) over the TRACK/SS pin. When the voltage on the TRACK pin the range of duty cycles. is below 0.6V, the feedback voltage will regulate to this tracking voltage. When the tracking voltage exceeds 0.6V,
Short-Circuit Protection
tracking is disabled and the feedback voltage will regulate to the internal reference voltage. When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. To The TRACK/SS pin is also used to implement an external prevent current runaway from occurring, a secondary soft-start function. A 1.2µA current is sourced from this current limit is imposed on the inductor current. If the pin so that an external capacitor may be added to create inductor valley current increases to more than 4.5A, the a smooth ramp. If this ramp is slower than the internal top power MOSFET will be held off and switching cycles 1ms soft-start, then the output voltage will track this ramp will be skipped until the inductor current is reduced. during start-up instead. Leave this pin floating to use the internal 1ms soft-start ramp.
Do not tie the TRACK/SS pin to INTVCC or to PVIN.
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