Datasheet LT3507 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Triple Monolithic Step-Down Regulator with LDO |
| Páginas / Página | 30 / 7 — pin Functions. BOOST1, BOOST2, BOOST3 (Pins 1, 27, 32):. PGOOD1, PGOOD2, … |
| Formato / tamaño de archivo | PDF / 395 Kb |
| Idioma del documento | Inglés |
pin Functions. BOOST1, BOOST2, BOOST3 (Pins 1, 27, 32):. PGOOD1, PGOOD2, PGOOD3 (Pins 10, 11, 12):. IN1 (Pins 2, 3):
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LT3507
pin Functions BOOST1, BOOST2, BOOST3 (Pins 1, 27, 32):
The BOOST
PGOOD1, PGOOD2, PGOOD3 (Pins 10, 11, 12):
The pins are used to provide drive voltages, higher than the PGOOD pins are the open-collector outputs of an internal input voltage, to the internal bipolar NPN power switches. comparator. PGOOD remains low until the FB pin is within These pins must be tied through a diode from VOUT, VIN 10% of the final regulation voltage. As well as indicating or another supply greater than 2.5V. output regulation, the PGOOD pins can sequence the
V
switching regulators. These pins must be left unconnected
IN1 (Pins 2, 3):
The VIN1 pins supply power to the internal switch of the 2.4A regulator and to the LT3507’s internal if unused. The PGOOD outputs are valid when VIN is greater reference and start-up circuitry. V than 3.8V and any of the RUN pins are high. They are not IN1 must be above the internal UVLO threshold of 3.8V (typical) for any of the valid when all RUN pins are low. four channels to operate. These pins must be locally
RT/SYNC (Pin 13):
The RT/SYNC pin requires a resistor bypassed (Note 6). to ground or a clock signal to set the operating frequency
V
of the LT3507.
INSW (Pin 4):
The VINSW pin is a switched VIN1 for the user programmable undervoltage and overvoltage detec-
RUN1, RUN2, RUN3 (Pins 14, 15, 16):
The RUN pins are tion. It is connected to VIN1 when any of the RUN pins used to shut down the individual switching regulators. are pulled high, and high impedance when all RUN pins When all three RUN pins are low, the LT3507 shuts down are low or open. and draws less than 1µA from VIN1.
OVLO (Pin 5):
The LT3507 goes into overvoltage shutdown
BIAS (Pin 17):
The BIAS pin supplies the current to the when this pin goes above 1.2V. If unused, the OVLO pin LT3507’s internal regulator. This pin should be tied to the should be tied to GND. lowest available voltage source above 3V (either VIN, VOUT
UVLO (Pin 6):
The LT3507 goes into undervoltage shut- or any other available supply). The LDO pass transistor’s down when this pin drops below 1.2V. If unused, the UVLO base current is supplied from the BIAS pin if it is at least pin should be tied to V 0.8V above the LDO DRIVE output. INSW.
V DRIVE (Pin 24):
The DRIVE pin provides the base drive
C1, VC2, VC3 (Pins 7, 23, 19):
The VC pins are the outputs of the internal error amps. The voltages on these pins for an external NPN transistor used for the LDO regulator. control the peak switch currents. These pins are normally
FB4 (Pin 25):
The FB4 pin is the negative input to the LDO used to compensate the control loops. Each switching error amplifier. It is regulated to 0.8V through the LDO regulator can be shut down by pulling its respective VC feedback resistor divider. pin to ground with an NMOS or NPN transistor.
VIN2 (Pins 30, 31)/VIN3 (Pins 35, 36 ):
The VIN2 and VIN3
TRK/SS1, TRK/SS2, TRK/SS3, TRK/SS4 (Pins 8, 21, 18,
pins supply power to the internal switches of the 1.5A
26):
The TRK/SS pins allow a regulator to track the output converters. These pins must be locally bypassed (Note 6). of another regulator. When the TRK/SS pin is below 0.8V,
SW1 (Pins 37, 38)/SW2 (Pins 28, 29)/SW3 (Pins 33, 34):
the FB pin regulates to the TRK/SS voltage. This pin can The SW pins are the outputs of the internal power switches. also be used as a soft-start by connecting a capacitor from Connect these pins to the inductors and switching diodes. TRK/SS to ground. The TRK/SS pins should be left open if neither feature is used.
Exposed Pad (Pin 39):
Ground. The underside Exposed Pad metal of the package provides both electrical contact
FB1, FB2, FB3 (Pins 9, 22, 20):
The FB pins are the nega- to ground and good thermal contact to the printed circuit tive inputs of the error amplifiers. The LT3507 regulates board. The Exposed Pad must be soldered to a grounded each feedback pin to the lesser of 0.8V or the TRK/SS pad on the circuit board for proper operation. pin voltage. Connect the feedback resistor divider taps to these pins. Note 6: VINX pins that are connected together may share a bypass capacitor. 3507fb For more information www.linear.com/LT3507 7
pin Functions BOOST1, BOOST2, BOOST3 (Pins 1, 27, 32):
The BOOST
PGOOD1, PGOOD2, PGOOD3 (Pins 10, 11, 12):
The pins are used to provide drive voltages, higher than the PGOOD pins are the open-collector outputs of an internal input voltage, to the internal bipolar NPN power switches. comparator. PGOOD remains low until the FB pin is within These pins must be tied through a diode from VOUT, VIN 10% of the final regulation voltage. As well as indicating or another supply greater than 2.5V. output regulation, the PGOOD pins can sequence the
V
switching regulators. These pins must be left unconnected
IN1 (Pins 2, 3):
The VIN1 pins supply power to the internal switch of the 2.4A regulator and to the LT3507’s internal if unused. The PGOOD outputs are valid when VIN is greater reference and start-up circuitry. V than 3.8V and any of the RUN pins are high. They are not IN1 must be above the internal UVLO threshold of 3.8V (typical) for any of the valid when all RUN pins are low. four channels to operate. These pins must be locally
RT/SYNC (Pin 13):
The RT/SYNC pin requires a resistor bypassed (Note 6). to ground or a clock signal to set the operating frequency
V
of the LT3507.
INSW (Pin 4):
The VINSW pin is a switched VIN1 for the user programmable undervoltage and overvoltage detec-
RUN1, RUN2, RUN3 (Pins 14, 15, 16):
The RUN pins are tion. It is connected to VIN1 when any of the RUN pins used to shut down the individual switching regulators. are pulled high, and high impedance when all RUN pins When all three RUN pins are low, the LT3507 shuts down are low or open. and draws less than 1µA from VIN1.
OVLO (Pin 5):
The LT3507 goes into overvoltage shutdown
BIAS (Pin 17):
The BIAS pin supplies the current to the when this pin goes above 1.2V. If unused, the OVLO pin LT3507’s internal regulator. This pin should be tied to the should be tied to GND. lowest available voltage source above 3V (either VIN, VOUT
UVLO (Pin 6):
The LT3507 goes into undervoltage shut- or any other available supply). The LDO pass transistor’s down when this pin drops below 1.2V. If unused, the UVLO base current is supplied from the BIAS pin if it is at least pin should be tied to V 0.8V above the LDO DRIVE output. INSW.
V DRIVE (Pin 24):
The DRIVE pin provides the base drive
C1, VC2, VC3 (Pins 7, 23, 19):
The VC pins are the outputs of the internal error amps. The voltages on these pins for an external NPN transistor used for the LDO regulator. control the peak switch currents. These pins are normally
FB4 (Pin 25):
The FB4 pin is the negative input to the LDO used to compensate the control loops. Each switching error amplifier. It is regulated to 0.8V through the LDO regulator can be shut down by pulling its respective VC feedback resistor divider. pin to ground with an NMOS or NPN transistor.
VIN2 (Pins 30, 31)/VIN3 (Pins 35, 36 ):
The VIN2 and VIN3
TRK/SS1, TRK/SS2, TRK/SS3, TRK/SS4 (Pins 8, 21, 18,
pins supply power to the internal switches of the 1.5A
26):
The TRK/SS pins allow a regulator to track the output converters. These pins must be locally bypassed (Note 6). of another regulator. When the TRK/SS pin is below 0.8V,
SW1 (Pins 37, 38)/SW2 (Pins 28, 29)/SW3 (Pins 33, 34):
the FB pin regulates to the TRK/SS voltage. This pin can The SW pins are the outputs of the internal power switches. also be used as a soft-start by connecting a capacitor from Connect these pins to the inductors and switching diodes. TRK/SS to ground. The TRK/SS pins should be left open if neither feature is used.
Exposed Pad (Pin 39):
Ground. The underside Exposed Pad metal of the package provides both electrical contact
FB1, FB2, FB3 (Pins 9, 22, 20):
The FB pins are the nega- to ground and good thermal contact to the printed circuit tive inputs of the error amplifiers. The LT3507 regulates board. The Exposed Pad must be soldered to a grounded each feedback pin to the lesser of 0.8V or the TRK/SS pad on the circuit board for proper operation. pin voltage. Connect the feedback resistor divider taps to these pins. Note 6: VINX pins that are connected together may share a bypass capacitor. 3507fb For more information www.linear.com/LT3507 7