Datasheet ADP2140 (Analog Devices) - 4

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ADP2140 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
Output Noise OUT V = V = 5 V, I = 10 mA NOISE IN2 IN1 OUT2 10 Hz to 100 kHz, V = 0.8 V 29 µV rms OUT2 10 Hz to 100 kHz, V = 1.2 V 40 µV rms OUT2 10 Hz to 100 kHz, V = 1.8 V 50 µV rms OUT2 10 Hz to 100 kHz, V = 2.5 V 66 µV rms OUT2 10 Hz to 100 kHz, V = 3.3 V 88 µV rms OUT2 Current Limit I T = 25°C 360 500 760 mA LIM J Input Leakage Current I EN2 = GND, V = 5.5 V and V = 0 V 1 μA LEAK-LDO IN2 OUT2 Start-Up Time1 t V = 3.3 V, 300 mA load 70 µs START-UP OUT2 Soft Start Time2 SS V = 3.3 V, 300 mA load 130 μs TIME OUT2 ADDITIONAL FUNCTIONS Undervoltage Lockout UVLO Input Voltage Rising UVLO 2.23 2.3 V RISE Input Voltage Falling UVLO 2.05 2.16 V FALL EN Input EN1, EN2 Input Logic High V 2.3 V ≤ V ≤ 5.5 V 1.0 V IH IN1 EN1, EN2 Input Logic Low V 2.3 V ≤ V ≤ 5.5 V 0.27 V IL IN1 EN1, EN2 Input Leakage I EN1, EN2 = V or GND 0.05 µA EN-LKG IN1 EN1, EN2 = V or GND 1 µA IN1 Shutdown Current I V = 5.5 V, EN1, EN2 = GND, T = −40°C to +85°C 0.3 1.2 μA SHUT IN1 J Thermal Shutdown Threshold TS T rising 150 SD J °C Hysteresis TS 20 SD-HYS °C Power Good Rising Threshold PG 92 %V RISE OUT Falling Threshold PG 86 %V FALL OUT Power-Good Hysteresis PG 6 %V HYS OUT Output Low V I = 4 mA 0.2 V OL SINK Leakage Current I Power-good pin pull-up voltage = 5.5 V 1 μA OH Buck to LDO Delay t PWM mode only 5 ms DELAY Power-Good Delay t PWM mode only 5 ms RESET 1 Start-up time is defined as the time between the rising edge of ENx to VOUTx being at 10% of the VOUTx nominal value. 2 Soft start time is defined as the time between VOUTx being at 10% to VOUTx being at 90% of the VOUTx nominal value. 3 Based on an endpoint calculation using 1 mA and 300 mA loads. 4 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.3 V.
RECOMMENDED SPECIFICATIONS: CAPACITORS AND INDUCTOR Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
MINIMUM INPUT AND OUTPUT CAPACITANCE1 TA = −40°C to +125°C Buck C 7.5 10 µF MIN LDO C 0.7 1.0 µF MIN CAPACITOR ESR TA = −40°C to +125°C Ω Buck R 0.001 0.01 Ω ESR LDO R 0.001 1 Ω ESR MINIMUM INDUCTOR IND 0.7 1 μH MIN 1 The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R- and X5R-type capacitors are recommended, Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. A | Page 4 of 32 Document Outline Features Applications General Description Typical Application Circuits Revision History Specifications Recommended Specifications: Capacitors and Inductor Pin Configuration and Function Descriptions Typical Performance Characteristics Buck Output LDO Output Theory of Operation Buck Section Control Scheme PWM Operation PSM Operation Pulse Skipping Threshold Selected Features Short-Circuit Protection Undervoltage Lockout Thermal Protection Soft Start Current Limit Power-Good Pin LDO Section Applications Information Power Sequencing Power-Good Function External Component Selection Selecting the Inductor Output Capacitor Input Capacitor Efficiency Power Switch Conduction Losses Inductor Losses Switching Losses Transition Losses Recommended Buck External Components LDO Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties LDO as a Postregulator to Reduce Buck Output Noise Thermal Considerations PCB Layout Considerations Outline Dimensions Ordering Guide