Datasheet LT3694, LT3694-1 (Analog Devices) - 7

LT3694/LT3694-1
PIN FUNCTIONS (FE/UFD) VIN (Pin 1/Pins 27, 28):
The VIN pin supplies power to the for the LDO regulators. The DRV pins can provide up to internal switch of the 2.6A regulator and to the LT3694’s 6V of base drive. internal reference and start-up circuitry. This pin must be
LIM2, LIM3 (Pins 10, 11/Pins 9, 14):
The LIM pins provide locally bypassed. current limiting on the LDO pass transistors by sensing
EN/UVLO (Pin 2/Pin 1):
The EN/UVLO pin is used to shut a voltage on an external sense resistor connected to the down the LT3694. It can be driven from a logic level or BIAS pin. These pins should be connected to BIAS if this used as an undervoltage lockout by connecting a resistor function is not used. divider from VIN.
GND (Pins 10, 11, 12, 13, 25, 26) UFD Package Only: CLKOUT (Pin 3/Pin 2):
Digital Clock Output. The CLKOUT Power and Signal Ground. pin allows synchronization of other switching regulators
V
(LT3694-1 only).
C1 (Pin 16/Pin 19):
Output of the Internal Error Amp. The voltage on this pin controls the peak switch cur-
SYNC (Pin 3/Pin 2):
Frequency Synchronization Input. rent. This pin is normally used to compensate the Connect a frequency source to this input if synchronization control loop. The switching regulator can be shut is desired. Connect SYNC to ground if not used (LT3694 down by pulling the VC1 pin to ground with an NMOS only). or NPN transistor.
PGOOD (Pin 4/Pin 3):
Open Collector Output. PGOOD is
BIAS (Pin 17/Pin 20):
The BIAS pin supplies the current pulled low when any of the three regulators drops out of to the LT3694’s internal regulator and boost circuits. This regulation (VFB < 90% of nominal value). must be connected to a voltage source above 3V, usually
RT (Pin 5/Pin 4):
The RT pin requires a resistor to ground to VOUT1. The LDO pass transistor base current will also to set the operating frequency of the LT3694. If synchroniz- come from the BIAS pin if it is at least 1.8V above the ing the LT3694 to an external clock, the resistor should LDO output. be set to program the frequency at least 20% below the
BST (Pin 18/Pin 21):
The BST pin is used to provide a synchronization frequency. drive voltage, higher than the input voltage, to the internal
TRK/SS1, TRK/SS2 , TRK/SS3 (Pins 6, 7, 14/Pins 5, 6, 17):
bipolar NPN power switch. The TRK/SS pins allow a regulator to track the output of
DA (Pin 19/Pin 22):
The DA pin senses the catch diode another regulator. When the TRK/SS pin is below 0.75V, current to prevent excessive inductor current in output the FB pin regulates to the TRK/SS voltage. This pin can overload or short-circuit conditions. also be used as a soft-start by connecting a capacitor from
SW (Pin 20/Pins 23, 24):
Output of the Internal Power TRK/SS to ground. The TRK/SS pins should be left open Switch. Connect this pin to the inductor and switching if neither feature is used. diode.
FB1, FB2, FB3 (Pins 15, 8, 13/Pins 18, 7, 16):
Negative
Exposed Pad (Pin 21/Pin 29):
Ground. The underside Inputs of the Error Amplifiers. The LT3694 regulates each exposed pad metal of the package provides both electrical feedback pin to the lesser of 0.75V or the corresponding contact to ground and a conductive thermal path to the TRK/SS pin voltage. Connect the feedback resistor divider printed circuit board. The Exposed Pad must be soldered to taps to these pins. a grounded pad on the circuit board for proper operation.
DRV2, DRV3 (Pins 9, 12/Pins 8, 15):
The DRV pins provide the base drive for the external NPN transistors 36941fb 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts