Datasheet LT3694, LT3694-1 (Analog Devices) - 4

LT3694/LT3694-1
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, VBIAS = 3V, unless otherwise noted. (Notes 2, 9) PARAMETER CONDITIONS MIN TYP MAX UNITS LDO Regulator
Feedback Pin Voltage l 735 750 765 mV Feedback Pin Bias Current l –50 –500 nA Error Amplifier Voltage Gain 2800 TRK/SS Pull-Up Current –2 –3 –4 µA TRK/SS Threshold to Shut Down LDO 35 50 70 mV Line Regulation 5V < VIN < 36V 0.025 %/V Load Regulation IDRV From 0.1mA to 10mA 0.5 mV/mA Base Drive l 10 15 20 mA Current Limit Threshold l 47 60 70 mV Short-Circuit Current Limit Threshold VFB = 0 22 26 30 mV Minimum BIAS to DRV Voltage (Note 7) IDRV = 10mA l 0.3 0.9 V Minimum VIN to DRV Voltage IDRV = 10mA l 2.0 2.3 V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
This IC includes overtemperature protection that is intended may cause permanent damage to the device. Exposure to any Absolute to protect the device during momentary overload conditions. Maximum Rating condition for extended periods may affect device Junction temperature will exceed the maximum operating range when reliability and lifetime. overtemperature protection is active. Continuous operation above the
Note 2:
The LT3694E is guaranteed to meet performance specifications specified maximum operating junction temperature may impair from 0°C to 125°C junction temperature. Specifications over the –40°C device reliability. to 125°C operating junction temperature range are assured by design,
Note 6:
Absolute Maximum Voltage at VIN and EN/UVLO pins is 70V for characterization and correlation with statistical process controls. The non-repetitive, 1 second transients and 36V for continuous operation. LT3694I is guaranteed to meet performance specifications from –40°C to
Note 7:
The LDO will function if the BIAS to DRV differential is not met, 125°C junction temperature. but the base drive current will be drawn from VIN instead of BIAS.
Note 3:
Current limit is guaranteed by design and/or correlation to static
Note 8:
The PGOOD pin will pull low when the voltage on any of the three test. Slope compensation reduces current limit at higher duty cycles. FB pins is lower than the PGOOD threshold value.
Note 4:
This is the minimum voltage across the boost capacitor needed to
Note 9:
Positive currents flow into pins, negative currents flow out of pins. guarantee full saturation of the internal power switch. Minimum and maximum values refer to absolute values. 36941fb 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts