Datasheet LTC3605A (Analog Devices) - 9

LTC3605A
operaTion PVIN/SVIN Voltage Differential Programming Switching Frequency
SVIN should be tied to PVIN with a low pass filter of 1Ω Connecting a resistor from the RT pin to SGND programs to 10Ω and 0.1μF. For applications where PVIN and SVIN the switching frequency from 800kHz to 4MHz according are tied to vastly different voltage potentials, though the to the following formula: output voltage will remain in regulation, there will be an 1.6e11 offset in the internal on-time generator such that if SVIN Frequency (Hz) = is different than PV R IN by more than 50% of the PVIN volt- T (W) age, the resulting switching frequency will deviate from The internal PLL has a synchronization range of ±30% the frequency programmed by the RT resistor and/or the around its programmed frequency. Therefore, during external clock synchronization frequency. In such applica- external clock synchronization be sure that the external tions, in order to return the switching frequency back to clock frequency is within this ±30% range of the RT pro- the original desired frequency, RT resistor value can be grammed frequency. adjusted accordingly. However, the better alternative is to tie the VON pin to a voltage different than that of VOUT
Output Voltage Tracking and Soft-Start
in order to negate the offset of the VIN differential. For instance, if SV The LTC3605A allows the user to program its output voltage IN is 6V and PVIN is 12V, the resulting switch- ing frequency may be slower than what’s programmed ramp rate by means of the TRACK/SS pin. An internal 2µA by the R pulls up the TRACK/SS pin to INTVCC. Putting an external T resistor. Tying the VON pin to a voltage half of V capacitor on TRACK/SS enables soft starting the output OUT will negate the VIN offset and return the switching frequency back to normal. to prevent current surge on the input supply. For output tracking applications, TRACK/SS can be externally driven
Output Voltage Programming
by another voltage source. From 0V to 0.6V, the TRACK/SS voltage will override the internal 0.6V reference input to the The output voltage is set by an external resistive divider error amplifier, thus regulating the feedback voltage to that according to the following equation: of TRACK/SS pins. During this start-up time, the LTC3605A VOUT = 0.6V • (1 + R2/R1) will operate in discontinuous mode. When TRACK/SS is above 0.6V, tracking is disabled and the feedback voltage The resistive divider allows the VFB pin to sense a fraction will regulate to the internal reference voltage. of the output voltage as shown in Figure 1.
Output Power Good
VOUT When the LTC3605A’s output voltage is within the ±10% R2 CFF window of the regulation point, which is reflected back as FB a VFB voltage in the range of 0.54V to 0.66V, the output LTC3605A R1 voltage is good and the PGOOD pin is pulled high with an external resistor. Otherwise, an internal open-drain SGND 3605A F01 pull-down device (12Ω) will pull the PGOOD pin low. To prevent unwanted PGOOD glitches during transients
Figure 1. Setting the Output Voltage
or dynamic VOUT changes, the LTC3605A’s PGOOD fall- ing edge includes a blanking delay of approximately 52 switching cycles. 3605afg For more information www.linear.com/LTC3605A 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts