Datasheet LTC3633A-2, LTC3633A-3 (Analog Devices) - 8

LTC3633A-2/LTC3633A-3
PIN FUNCTIONS (QFN/TSSOP) PGOOD1 (Pin 1/Pin 4):
Channel 1 Open-Drain Power internal 0.6V reference. PGOOD2 becomes high imped- Good Output Pin. PGOOD1 is pulled to ground when the ance once the VFB2 pin returns to within ±5% (typical) of voltage on the VFB1 pin is not within ±8% (typical) of the the internal reference. internal 0.6V reference. PGOOD1 becomes high imped-
V
ance once the V
FB2 (Pin 9/Pin 12):
Channel 2 Output Feedback Voltage FB1 pin returns to within ±5% (typical) of Pin. Input to the error amplifier that compares the feedback the internal reference. voltage to the internal 0.6V reference voltage. Connect this
PHMODE (Pin 2/Pin 5):
Phase Select Input. Tie this pin pin to a resistor divider network to program the desired to ground to force both channels to switch in phase. Tie output voltage. this pin to INTVCC to force both channels to switch 180°
TRACKSS2 (Pin 10/Pin 13):
Output Tracking and Soft- out of phase. Do not float this pin. Start Input Pin for Channel 2. Forcing a voltage below
RUN1 (Pin 3/Pin 6):
Channel 1 Regulator Enable Pin. 0.6V on this pin bypasses the internal reference input to Enables channel 1 operation by tying RUN1 above 1.22V. the error amplifier. The LTC3633A-2 will servo the FB pin Tying it below 1V places channel 1 into shutdown. Do not to the TRACK voltage under this condition. Above 0.6V, float this pin. the tracking function stops and the internal reference
MODE/SYNC (Pin 4/Pin 7):
Mode Select and External resumes control of the error amplifier. An internal 1.4µA Synchronization Input. Tie this pin to ground to force pull up current from INTVCC allows a soft start function continuous synchronous operation at all output loads. to be implemented by connecting a capacitor between Floating this pin or tying it to INTV this pin and SGND. CC enables high effi- ciency Burst Mode operation at light loads. Drive this pin
ITH2 (Pin 11/Pin 14):
Channel 2 Error Amplifier Output with a clock to synchronize the LTC3633A-2 switching. and Switching Regulator Compensation Pin. Connect this An internal phase-locked loop will force the bottom power pin to appropriate external components to compensate NMOS’s turn on signal to be synchronized with the rising the regulator loop frequency response. Connect this pin edge of the CLKIN signal. When this pin is driven with a to INTVCC to use the default internal compensation. clock, forced continuous mode is automatically selected.
VON2 (Pin 12/Pin 15):
On-Time Voltage Input for Chan-
RT (Pin 5/Pin 8):
Oscillator Frequency Program Pin. nel 2. This pin sets the voltage trip point for the on-time Connect an external resistor (between 80k to 640k) from comparator. Tying this pin to the output voltage makes this pin to SGND in order to program the frequency from the on-time proportional to VOUT2 when VOUT2 is within 500kHz to 4MHz. When RT is tied to INTVCC, the switching the VON2 sense range (0.6V – 6V for LTC3633A-2, 1.5V frequency will default to 2MHz. – 12V for LTC3633A-3). When VOUT2 is outside the VON2
RUN2 (Pin 6/Pin 9):
Channel 2 Regulator Enable Pin. sense range, the switching frequency may deviate from Enables channel 2 operation by tying RUN2 above 1.22V. the programmed frequency. The pin impedance is nomi- Tying it below 1V places channel 2 into shutdown. Do not nally 140kΩ. float this pin.
SW2 (Pins 13, 14/Pins 16, 17):
Channel 2 Switch Node
SGND (Pin 7/Pin 10):
Signal Ground Pin. This pin should Connection to External Inductor. Voltage swing of SW is have a low noise connection to reference ground. The from a diode voltage drop below ground to PVIN. feedback resistor network, external compensation network,
PVIN2 (Pins 15, 16/Pins 18, 19):
Power Supply Input for and RT resistor should be connected to this ground. Channel 2. Input voltage to the on chip power MOSFETs
PGOOD2 (Pin 8/Pin 11):
Channel 2 Open-Drain Power on channel 2. This input is capable of operating from a Good Output Pin. PGOOD2 is pulled to ground when the different supply voltage than PVIN1. voltage on the VFB2 pin is not within ±8% (typical) of the 3633a23fb 8 For more information www.linear.com/LTC3633A-2 Document Outline Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Package Description Typical Application Related Parts