Datasheet ADP2380 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | 20 V, 4 A synchronous Step-Down Regulator with Low-Side Driver |
| Páginas / Página | 28 / 10 — ADP2380. Data Sheet. EN/SS. SYNC. OUT. PGOOD. CH1 2.00V B. CH2 5.00V. … |
| Formato / tamaño de archivo | PDF / 946 Kb |
| Idioma del documento | Inglés |
ADP2380. Data Sheet. EN/SS. SYNC. OUT. PGOOD. CH1 2.00V B. CH2 5.00V. M2.00ms. A CH2 4.40V. CH3 5.00V. CH2 10.0V. M1.00µs. A CH2 7.40V. CH3 5.00V B
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ADP2380 Data Sheet EN/SS SYNC 3 V 3 OUT 1 SW PGOOD 2 2 IL 4
022
CH1 2.00V B CH2 5.00V M2.00ms A CH2 4.40V B
025
W CH3 5.00V CH2 10.0V M1.00µs A CH2 7.40V W CH3 5.00V B CH4 2.00A Ω B W W T 60.40%
09939-
T 50.40%
09939- Figure 22. Precharged Output Figure 25. External Synchronization
VOUT (AC) VOUT (AC) 1 1 VIN SW IOUT 3 4 2
6 023 -02
CH1 100mV B M200µs A CH4 2.96A CH1 20mV B CH2 10V B M1ms A CH3 13.8V W W W CH4 2.00A Ω B T 70.40% CH3 5V Ω B T 30% W
09939-
W
09939 Figure 23. Load Transient Response, 1 A to 4 A Figure 26. Line Transient Response, VIN from 10 V to 16 V, IOUT = 4 A
VOUT VOUT 1 1 SW SW 2 2 IL IL 4 4
024
CH1 2.00V B CH2 10.0V M4.00ms A CH1 1.32V
027
W CH1 2.00V B CH2 10.0V M4.00ms A CH1 1.96V CH4 5.00A Ω W BW T 20.40% CH4 5.00A Ω B
09939-
W T 70.20%
09939- Figure 24. Output Short Entry Figure 27. Output Short Recovery Rev. 0 | Page 10 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide
022
CH1 2.00V B CH2 5.00V M2.00ms A CH2 4.40V B
025
W CH3 5.00V CH2 10.0V M1.00µs A CH2 7.40V W CH3 5.00V B CH4 2.00A Ω B W W T 60.40%
09939-
T 50.40%
09939- Figure 22. Precharged Output Figure 25. External Synchronization
VOUT (AC) VOUT (AC) 1 1 VIN SW IOUT 3 4 2
6 023 -02
CH1 100mV B M200µs A CH4 2.96A CH1 20mV B CH2 10V B M1ms A CH3 13.8V W W W CH4 2.00A Ω B T 70.40% CH3 5V Ω B T 30% W
09939-
W
09939 Figure 23. Load Transient Response, 1 A to 4 A Figure 26. Line Transient Response, VIN from 10 V to 16 V, IOUT = 4 A
VOUT VOUT 1 1 SW SW 2 2 IL IL 4 4
024
CH1 2.00V B CH2 10.0V M4.00ms A CH1 1.32V
027
W CH1 2.00V B CH2 10.0V M4.00ms A CH1 1.96V CH4 5.00A Ω W BW T 20.40% CH4 5.00A Ω B
09939-
W T 70.20%
09939- Figure 24. Output Short Entry Figure 27. Output Short Recovery Rev. 0 | Page 10 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide