Datasheet ADP2390 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | 18 V, 12 A Step-Down Regulator with Programmable Current Limit and PFM |
| Páginas / Página | 23 / 6 — ADP2389/ADP2390. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL … |
| Formato / tamaño de archivo | PDF / 786 Kb |
| Idioma del documento | Inglés |
ADP2389/ADP2390. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL INFORMATION. Parameter Rating. Table 3. Thermal Resistance
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ADP2389/ADP2390 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL INFORMATION Parameter Rating
θJA is specified for the worst-case conditions, that is, a device PVIN, VIN, EN, PGOOD −0.3 V to +22 V soldered in a circuit board (4-layer, JEDEC standard board) for SW −1 V to +22 V surface-mount packages. BST VSW + 6 V
Table 3. Thermal Resistance
FB, SS, COMP, RT, ILIM, FTW, VREG −0.3 V to +6 V
Package Type θ
PGND to GND −0.3 V to +0.3 V
JA θJC Unit
Operating Junction Temperature Range −40°C to +125°C 32-Lead LFCSP 41 2.2 °C/W Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Unless otherwise specified, all other voltages are referenced to GND. Rev. 0 | Page 6 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL INFORMATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PFM MODE (ADP2390 ONLY) PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SOFT START FAST TRANSIENT RESPONSE POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO COMPENSATION DESIGN DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION SCHEMATIC FOR DESIGN EXAMPLE EXTERNAL COMPONENTS RECOMMENDATION CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
θJA is specified for the worst-case conditions, that is, a device PVIN, VIN, EN, PGOOD −0.3 V to +22 V soldered in a circuit board (4-layer, JEDEC standard board) for SW −1 V to +22 V surface-mount packages. BST VSW + 6 V
Table 3. Thermal Resistance
FB, SS, COMP, RT, ILIM, FTW, VREG −0.3 V to +6 V
Package Type θ
PGND to GND −0.3 V to +0.3 V
JA θJC Unit
Operating Junction Temperature Range −40°C to +125°C 32-Lead LFCSP 41 2.2 °C/W Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Unless otherwise specified, all other voltages are referenced to GND. Rev. 0 | Page 6 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL INFORMATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PFM MODE (ADP2390 ONLY) PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SOFT START FAST TRANSIENT RESPONSE POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO COMPENSATION DESIGN DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION SCHEMATIC FOR DESIGN EXAMPLE EXTERNAL COMPONENTS RECOMMENDATION CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE