Datasheet ADP5301 (Analog Devices) - 3

Data Sheet ADP5301 FUNCTIONAL BLOCK DIAGRAM PVIN VOUTOK PVIN 90% 87% I DRIVER LIM_PWM FB SW ILIM_HYS CONTROL –0.6A(PWM) LOGIC 0A(HYS) PWM PVIN Σ SLOPE DRIVER COMPENSATION PGND STANDBY 0.808V 0.8V FB INTERNAL FEEDBACK RESISTOR 0.8V DIVIDER VID V TO I MODE 1.2V 0.4V SOFT AGND START EN BAND GAP BIAS AND PVIN HOUSEKEEPING UVLO 2.06V 2.00V 1.2V 0.4V SYNC 2MHz SYNC/ OSC MODE MODE
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KEEP ALIVE BLOCK
00 9- 16 3 1 Figure 2. Rev. B | Page 3 of 21 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode Hysteresis Mode Mode Selection OSCILLATOR AND SYNCHRONIZATION ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH A PRECHARGED OUTPUT 100% DUTY CYCLE OPERATION ACTIVE DISCHARGE VOUTOK FUNCTION THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses PRINTED CIRCUIT BOARD (PCB) LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE