Datasheet ADP2443 (Analog Devices) - 3

Data Sheet ADP2443 FUNCTIONAL BLOCK DIAGRAM VREG 4µA ADP2443 EN EN_BUF 5V PVIN 0.13µA 1.2V REGULATOR PGOOD UVLO DEGLITCH GND 0.66V BOOST REGULATOR 0.54V BST 0.7V OVP NFET DRIVER CONTROL LOGIC AND MOSFET SW DRIVER WITH ANTICROSS VREG FB PROTECTION 0.6V I AMP AMP SS NFET CMP DRIVER SS PGND COMP SLOPE COMPENSATION RAMP AND RAMP GENERATOR ACS HICCUP MODE RT/SYNC OSC OCP OCP CLK INEG IMAX
003
NEGATIVE CURRENT CMP
14794- Figure 3. Rev. 0 | Page 3 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO SLOPE COMPENSATION SETTING COMPENSATION DESIGN ADIsimPOWER DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION SLOPE COMPENSATION SETTING COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION RECOMMENDED EXTERNAL COMPONENTS PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE