Datasheet LTC7124 (Analog Devices) - 10

LTC7124
OPERATION
As the BOOST-SW capacitor depletes charge, the gate voltage falls out below the desired regulation voltage. In drive voltage for the top power switch decreases, which forced continuous mode, an overvoltage condition will increases the RDS(ON). At heavy loads, this increased halt switching until the output decreases to within 7.5% RDS(ON) can result in excessive power dissipation. While of the desired regulation voltage. this scenario is avoided through the forced refresh of the BOOST-SW capacitor, the maximum duty cycle of the
Input Overvoltage Protection
regulator is limited to 99%. To protect the power MOSFETs from transient spikes, If the part is programmed for either Burst Mode or pulse the input supply voltage of each channel is continually skipping mode, the regulator will transition in and out of monitored. When the input voltage exceeds 18.4V, the the sleep state as needed to keep the output voltage in regulator suspends switching and resets the internal regulation. soft-start capacitor. Once the input voltage has fallen below 18V, the regulator will resume normal switching
Minimum On-Time Considerations
operation, if its respective RUN pin is tied high. The minimum on-time is the smallest amount of time that
Low Supply Operation
the LTC7124 can turn on the top power MOSFET, trip the peak current comparator and turn off the top power To ensure that the regulator will operate properly, the MOSFET. As specified in the Electrical Characteristics Table, LTC7124 incorporates an undervoltage lockout circuit, this time is typically 50ns. As a result, the minimum duty which shuts down both channels when VIN1 drops below cycle can be calculated as: 3.1V. Once VIN1 rises above this lower limit, both switchers will resume normal operation if their respective DCMIN = f • tON(MIN) RUN pins are enabled. Nevertheless, the RDS(ON) of the where tON(MIN) is the minimum on time. As seen in the power switches may be slightly higher due to lower gate equation above, decreasing the operating frequency loos- drive depending on the value of VIN1 (see RDS(ON) vs Input ens the minimum duty cycle constraint. Supply Voltage graph). For a given VIN, the lowest output voltage for which the
Soft-Start
switcher can maintain regulation is as follows: The LTC7124 has an internal 1100µs soft start ramp. VOUT(MIN) = VIN • f • tON(MIN) During this soft-start period, the part will operate in pulse- In the case where the minimum duty cycle constraint skipping mode regardless of the mode programmed by the is violated, the output voltage will not be in regulation MODE/SYNC pin. Once the soft-start period is complete, and generate an overvoltage condition. In both DCMs, the part will transition into the desired mode of operation. the switcher will remain in sleep mode until the output 7124fa 10 For more information www.linear.com/LTC7124