Datasheet LT1211, LT1212 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | 14MHz, 7V/µs, Single Supply Dual and Quad Precision Op Amps |
| Páginas / Página | 20 / 8 — ELECTRICAL CH. ARA TERISTICS. Note 1:. Note 6:. Note 2:. Note 3:. Note … |
| Formato / tamaño de archivo | PDF / 394 Kb |
| Idioma del documento | Inglés |
ELECTRICAL CH. ARA TERISTICS. Note 1:. Note 6:. Note 2:. Note 3:. Note 7:. Note 8:. Note 9:. Note 4:. Note 10:. Note 5:. TYPICAL PERFOR A CE CH
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LT1211/LT1212
ELECTRICAL CH C ARA TERISTICS Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
The LT1211C/LT1212C are guaranteed to meet specified of a device may be impaired. performance from 0°C to 70°C and are designed, characterized and
Note 2:
A heat sink may be required to keep the junction temperature expected to meet these extended temperature limits, but are not tested at below absolute maximum when the output is shorted indefinitely. – 40°C and 85°C. The LT1211I/LT1212I are guaranteed to meet the extended temperature limits.
Note 3:
TJ is calculated from the ambient temperature TA and power dissipation P
Note 7:
Slew rate is measured between ±8.5V on an output swing of ±10V D according to the following formulas: on ±15V supplies. LT1211MJ8, LT1211AMJ8: TJ = TA + (PD × 100°C/W) LT1211CN8, LT1211ACN8: T
Note 8:
Most LT1211/LT1212 electrical characteristics change very little J = TA + (PD × 100°C/W) LT1211CS8: T with supply voltage. See the 5V tables for characteristics not listed in the J = TA + (PD × 150°C/W) LT1212CN: T 3.3V table. J = TA + (PD × 70°C/W) LT1212CS: TJ = TA + (PD × 100°C/W)
Note 9:
Guaranteed by correlation to 5V and ±15V tests.
Note 4:
This parameter is not 100% tested.
Note 10:
Guaranteed by correlation to 3.3V tests.
Note 5:
Guaranteed by correlation to 3.3V and ±15V tests.
W U TYPICAL PERFOR A CE CH C ARA TERISTICS Distribution of Offset Voltage Drift Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
70 50 70 V LT1211 J8 PACKAGE V LT1211 J8 PACKAGE S = 5V V LT1211 J8 PACKAGE S = 5V S = ±15V 60 LT1211 N8 PACKAGE LT1211 N8 PACKAGE 60 LT1211 N8 PACKAGE 40 50 50 30 40 40 30 30 20 20 20 PERCENT OF UNITS (%) PERCENT OF UNITS (%) PERCENT OF UNITS (%) 10 10 10 0 0 0 –350 –250 –150 –50 50 150 250 350 –3 –2 –1 0 1 2 3 –700 –500 –300 –100 100 300 500 700 INPUT OFFSET VOLTAGE (µV) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV) 1211/12 G01 1211/12 G03 1211/12 G02
Distribution of Offset Voltage Drift Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
70 50 70 V LT1211 S8 PACKAGE VS = 5V V LT1211 S8 PACKAGE S = 5V S = ±15V 60 LT1212 N PACKAGE 60 LT1212 N PACKAGE LT1211 S8 PACKAGE LT1212 S PACKAGE LT1212 S PACKAGE 40 LT1212 N PACKAGE 50 LT1212 S PACKAGE 50 30 40 40 30 30 20 20 20 PERCENT OF UNITS (%) PERCENT OF UNITS (%) PERCENT OF UNITS (%) 10 10 10 0 0 0 –350 –250 –150 –50 50 150 250 350 –6 –4 –2 0 2 4 6 –700 –500 –300 –100 100 300 500 700 INPUT OFFSET VOLTAGE (µV) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV) 1211/12 G04 1211/12 G06 1211/12 G05 8
ELECTRICAL CH C ARA TERISTICS Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
The LT1211C/LT1212C are guaranteed to meet specified of a device may be impaired. performance from 0°C to 70°C and are designed, characterized and
Note 2:
A heat sink may be required to keep the junction temperature expected to meet these extended temperature limits, but are not tested at below absolute maximum when the output is shorted indefinitely. – 40°C and 85°C. The LT1211I/LT1212I are guaranteed to meet the extended temperature limits.
Note 3:
TJ is calculated from the ambient temperature TA and power dissipation P
Note 7:
Slew rate is measured between ±8.5V on an output swing of ±10V D according to the following formulas: on ±15V supplies. LT1211MJ8, LT1211AMJ8: TJ = TA + (PD × 100°C/W) LT1211CN8, LT1211ACN8: T
Note 8:
Most LT1211/LT1212 electrical characteristics change very little J = TA + (PD × 100°C/W) LT1211CS8: T with supply voltage. See the 5V tables for characteristics not listed in the J = TA + (PD × 150°C/W) LT1212CN: T 3.3V table. J = TA + (PD × 70°C/W) LT1212CS: TJ = TA + (PD × 100°C/W)
Note 9:
Guaranteed by correlation to 5V and ±15V tests.
Note 4:
This parameter is not 100% tested.
Note 10:
Guaranteed by correlation to 3.3V tests.
Note 5:
Guaranteed by correlation to 3.3V and ±15V tests.
W U TYPICAL PERFOR A CE CH C ARA TERISTICS Distribution of Offset Voltage Drift Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
70 50 70 V LT1211 J8 PACKAGE V LT1211 J8 PACKAGE S = 5V V LT1211 J8 PACKAGE S = 5V S = ±15V 60 LT1211 N8 PACKAGE LT1211 N8 PACKAGE 60 LT1211 N8 PACKAGE 40 50 50 30 40 40 30 30 20 20 20 PERCENT OF UNITS (%) PERCENT OF UNITS (%) PERCENT OF UNITS (%) 10 10 10 0 0 0 –350 –250 –150 –50 50 150 250 350 –3 –2 –1 0 1 2 3 –700 –500 –300 –100 100 300 500 700 INPUT OFFSET VOLTAGE (µV) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV) 1211/12 G01 1211/12 G03 1211/12 G02
Distribution of Offset Voltage Drift Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
70 50 70 V LT1211 S8 PACKAGE VS = 5V V LT1211 S8 PACKAGE S = 5V S = ±15V 60 LT1212 N PACKAGE 60 LT1212 N PACKAGE LT1211 S8 PACKAGE LT1212 S PACKAGE LT1212 S PACKAGE 40 LT1212 N PACKAGE 50 LT1212 S PACKAGE 50 30 40 40 30 30 20 20 20 PERCENT OF UNITS (%) PERCENT OF UNITS (%) PERCENT OF UNITS (%) 10 10 10 0 0 0 –350 –250 –150 –50 50 150 250 350 –6 –4 –2 0 2 4 6 –700 –500 –300 –100 100 300 500 700 INPUT OFFSET VOLTAGE (µV) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV) 1211/12 G04 1211/12 G06 1211/12 G05 8