Datasheet LT1225 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónVery High Speed Operational Amplifier
Páginas / Página8 / 6 — APPLICATI. S I FOR ATIO. Small Signal, A. V = 5. Small Signal, AV = – 5. …
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APPLICATI. S I FOR ATIO. Small Signal, A. V = 5. Small Signal, AV = – 5. Offset Nulling. Layout and Passive Components

APPLICATI S I FOR ATIO Small Signal, A V = 5 Small Signal, AV = – 5 Offset Nulling Layout and Passive Components

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LT1225
O U U W U APPLICATI S I FOR ATIO Small Signal, A
The LT1225 may be inserted directly into HA2541, HA2544,
V = 5 Small Signal, AV = – 5
AD847, EL2020 and LM6361 applications, provided that the amplifier configuration is a noise gain of 5 or greater, and the nulling circuitry is removed. The suggested nulling circuit for the LT1225 is shown below.
Offset Nulling
V+ 5k 0.1µF LT1225 AI02 1 The large-signal response in both inverting and noninvert- 3 + 8 7 ing gain shows symmetrical slewing characteristics. Nor- 6 LT1225 mally the noninverting response has a much faster rising 2 – 4 edge than falling edge due to the rapid change in input 0.1µF V – common-mode voltage which affects the tail current of the LT1225 AI01 input differential pair. Slew enhancement circuitry has been added to the LT1225 so that the noninverting slew
Layout and Passive Components
rate response is balanced. As with any high speed operational amplifier, care must be
Large Signal, AV = 5 Large Signal, AV = –5
taken in board layout in order to obtain maximum perfor- mance. Key layout issues include: use of a ground plane, minimization of stray capacitance at the input pins, short lead lengths, RF-quality bypass capacitors located close to the device (typically 0.01µF to 0.1µF), and use of low ESR bypass capacitors for high drive current applications (typically 1µF to 10µF tantalum). Sockets should be avoided when maximum frequency performance is LT1225 AI03 required, although low profile sockets can provide
Input Considerations
reasonable performance up to 50MHz. For more details see Design Note 50. Feedback resistor values greater than Resistors in series with the inputs are recommended for 5k are not recommended because a pole is formed with the the LT1225 in applications where the differential input input capacitance which can cause peaking. If feedback voltage exceeds ±6V continuously or on a transient basis. resistors greater than 5k are used, a parallel An example would be in noninverting configurations with capacitor of 5pF to 10pF should be used to cancel the input high input slew rates or when driving heavy capacitive pole and optimize dynamic performance. loads. The use of balanced source resistance at each input is recommended for applications where DC accuracy must
Transient Response
be maximized. The LT1225 gain-bandwidth is 150MHz when measured at
Capacitive Loading
1MHz. The actual frequency response in gain of 5 is considerably higher than 30MHz due to peaking caused by The LT1225 is stable with all capacitive loads. This is a second pole beyond the gain of 5 crossover point. This accomplished by sensing the load induced output pole and is reflected in the small-signal transient response. Higher adding compensation at the amplifier gain node. As the noise gain configurations exhibit less overshoot as seen in capacitive load increases, both the bandwidth and phase the inverting gain of 5 response. margin decrease so there will be peaking in the frequency 6