Datasheet LT1801, LT1802 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Quad 80MHz, 25V/µs Low Power Rail-to-Rail Input and Output Precision Op Amps |
| Páginas / Página | 20 / 8 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply … |
| Formato / tamaño de archivo | PDF / 354 Kb |
| Idioma del documento | Inglés |
ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the temperature range
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LT1801/LT1802
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the temperature range of – 40°C < TA < 85°C. VS = ±5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS TC Input Offset Voltage Drift (Note 8) l 1.5 5 μV/°C I – B Input Bias Current VCM = VS + 1V l 50 400 nA V + CM = VS – 0.2V l 450 2250 nA Input Bias Current Match V – CM = VS + 1V l 25 450 nA (Channel-to-Channel) (Note 9) V + CM = VS – 0.2V l 25 700 nA I – OS Input Offset Current VCM = VS + 1V l 25 350 nA V + CM = VS – 0.2V l 25 350 nA AVOL Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k l 12.5 55 V/mV VO = –1V to 1V, RL = 100Ω l 2 5 V/mV CMRR Common Mode Rejection Ratio V – CM = VS to 3.5V l 81 104 dB CMRR Match (Channel-to-Channel) (Note 9) V – CM = VS to 3.5V l 75 104 dB Input Common Mode Range l V – + S VS V PSRR Power Supply Rejection Ratio V + – S = 2.5V to 10V, VS = 0V l 73 90 dB PSRR Match (Channel-to-Channel) (Note 9) V + – S = 2.5V to 10V, VS = 0V l 67 90 dB VOL Output Voltage Swing Low (Note 7) No Load l 20 100 mV I l SINK = 5mA 110 275 mV I l SINK = 10mA 180 400 mV VOH Output Voltage Swing High (Note 7) No Load l 30 110 mV I l SOURCE = 5mA 150 350 mV I l SOURCE = 10mA 300 700 mV ISC Short-Circuit Current l 12.5 30 mA IS Supply Current per Amplifi er l 2.6 4.5 mA GBW Gain Bandwidth Product Frequency = 2MHz l 65 MHz SR Slew Rate AV = – 1, RL = 1k, VO = ±4V, l 15 V/μs Measured at VO = ±2V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Minimum supply voltage is guaranteed by power supply rejection may cause permanent damage to the device. Exposure to any Absolute ratio test. Maximum Rating condition for extended periods may affect device
Note 7:
Output voltage swings are measured between the output and reliability and lifetime. power supply rails.
Note 2:
The inputs are protected by back-to-back diodes. If the differential
Note 8:
This parameter is not 100% tested. input voltage exceeds 1.4V, the input current should be limited to less than
Note 9:
Matching parameters are the difference between amplifi ers A 10mA. It is not 100% tested. and D and between B and C on the LT1802; between the two amplifi ers
Note 3:
A heat sink may be required to keep the junction temperature on the LT1801. below the absolute maximum rating when the output is shorted
Note 10:
Thermal resistance (θ indefi nitely. JA) varies with the amount of PC board metal connected to the package. The specifi ed values are for short
Note 4:
The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed traces connected to the leads. If desired, the thermal resistance can be functional over the temperature range of – 40°C to 85°C. substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of
Note 5:
The LT1801C/LT1802C are guaranteed to meet specifi ed the SO-14 or the underside metal of the DD package to a larger metal area performance from 0°C to 70°C. The LT1801C/LT1802C are designed, (V – S trace). characterized and expected to meet specifi ed performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1801I/LT1802I are guaranteed to meet specifi ed performance from –40°C to 85°C. 18012fc 8
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the temperature range of – 40°C < TA < 85°C. VS = ±5V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS TC Input Offset Voltage Drift (Note 8) l 1.5 5 μV/°C I – B Input Bias Current VCM = VS + 1V l 50 400 nA V + CM = VS – 0.2V l 450 2250 nA Input Bias Current Match V – CM = VS + 1V l 25 450 nA (Channel-to-Channel) (Note 9) V + CM = VS – 0.2V l 25 700 nA I – OS Input Offset Current VCM = VS + 1V l 25 350 nA V + CM = VS – 0.2V l 25 350 nA AVOL Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k l 12.5 55 V/mV VO = –1V to 1V, RL = 100Ω l 2 5 V/mV CMRR Common Mode Rejection Ratio V – CM = VS to 3.5V l 81 104 dB CMRR Match (Channel-to-Channel) (Note 9) V – CM = VS to 3.5V l 75 104 dB Input Common Mode Range l V – + S VS V PSRR Power Supply Rejection Ratio V + – S = 2.5V to 10V, VS = 0V l 73 90 dB PSRR Match (Channel-to-Channel) (Note 9) V + – S = 2.5V to 10V, VS = 0V l 67 90 dB VOL Output Voltage Swing Low (Note 7) No Load l 20 100 mV I l SINK = 5mA 110 275 mV I l SINK = 10mA 180 400 mV VOH Output Voltage Swing High (Note 7) No Load l 30 110 mV I l SOURCE = 5mA 150 350 mV I l SOURCE = 10mA 300 700 mV ISC Short-Circuit Current l 12.5 30 mA IS Supply Current per Amplifi er l 2.6 4.5 mA GBW Gain Bandwidth Product Frequency = 2MHz l 65 MHz SR Slew Rate AV = – 1, RL = 1k, VO = ±4V, l 15 V/μs Measured at VO = ±2V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Minimum supply voltage is guaranteed by power supply rejection may cause permanent damage to the device. Exposure to any Absolute ratio test. Maximum Rating condition for extended periods may affect device
Note 7:
Output voltage swings are measured between the output and reliability and lifetime. power supply rails.
Note 2:
The inputs are protected by back-to-back diodes. If the differential
Note 8:
This parameter is not 100% tested. input voltage exceeds 1.4V, the input current should be limited to less than
Note 9:
Matching parameters are the difference between amplifi ers A 10mA. It is not 100% tested. and D and between B and C on the LT1802; between the two amplifi ers
Note 3:
A heat sink may be required to keep the junction temperature on the LT1801. below the absolute maximum rating when the output is shorted
Note 10:
Thermal resistance (θ indefi nitely. JA) varies with the amount of PC board metal connected to the package. The specifi ed values are for short
Note 4:
The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed traces connected to the leads. If desired, the thermal resistance can be functional over the temperature range of – 40°C to 85°C. substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of
Note 5:
The LT1801C/LT1802C are guaranteed to meet specifi ed the SO-14 or the underside metal of the DD package to a larger metal area performance from 0°C to 70°C. The LT1801C/LT1802C are designed, (V – S trace). characterized and expected to meet specifi ed performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1801I/LT1802I are guaranteed to meet specifi ed performance from –40°C to 85°C. 18012fc 8