Datasheet LT6555 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | 650MHz Gain of 2 Triple 2:1Video Multiplexer |
| Páginas / Página | 16 / 10 — APPLICATIO S I FOR ATIO. Input Expansion. Figure 3. Disabled Amplifiers … |
| Formato / tamaño de archivo | PDF / 374 Kb |
| Idioma del documento | Inglés |
APPLICATIO S I FOR ATIO. Input Expansion. Figure 3. Disabled Amplifiers Load the Cable
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LT6555
U U W U APPLICATIO S I FOR ATIO
To maintain the LT6555’s channel isolation, it is beneficial Figure 3 illustrates the loading effect of expanding the to shield parallel input and parallel output traces using a number of inputs. The resultant gain error can be calcu- ground plane or power supply traces. Vias between topside lated by the following formula using n as the number of and backside metal may be required to maintain a low LT6555s: inductance ground near the part where numerous traces converge. See Figures 6 and 7 for photos of an optimized ⎛ 435Ω Ω ⎞ layout. ⎜ 75 ⎟ Gain Error (dB) = 6dB + 20log n – 1 dB ⎜ 435 ⎟
Input Expansion
⎜ 75 + Ω Ω ⎝ 75 n – 1 ⎠⎟ In applications with more than two inputs per channel, multiple LT6555s can be connected by several different For example, two LT6555s would result in a gain error of methods. The simplest method is to connect the outputs –0.74dB per channel. Three LT6555s (i.e., six red inputs, after the 75Ω series termination, as shown in Figure 2. The six green inputs and six blue inputs), would have a gain compromise of this approach is that the internal gain error of –1.4dB. setting resistors cause a 435Ω shunt across the 75Ω cable termination, resulting in increased gain error. 1/3 LT6555 #1 IN1A 75Ω 360Ω OFF IN1A 360Ω A 75Ω V = 2 ⇒ 75Ω 435 R2 IN1B n – 1 75 360Ω Ω OFF IN1B 360Ω EN n = NUMBER OF LT6555s LT6555 #1 IN PARALLEL 1/3 LT6555 #2 CABLE IN1C 75Ω 360Ω OFF 75Ω IN1C A 360Ω V = +2 75Ω OUT IN1D 360Ω ON 75Ω IN1D 360Ω EN LT6555 #2 6555 F03 . CHIP 6555 F02 n SELECT 74HC04
Figure 3. Disabled Amplifiers Load the Cable Figure 2. Two LT6555s Build a 4-Input Router Termination with 435
Ω
Each
6555f 10
U U W U APPLICATIO S I FOR ATIO
To maintain the LT6555’s channel isolation, it is beneficial Figure 3 illustrates the loading effect of expanding the to shield parallel input and parallel output traces using a number of inputs. The resultant gain error can be calcu- ground plane or power supply traces. Vias between topside lated by the following formula using n as the number of and backside metal may be required to maintain a low LT6555s: inductance ground near the part where numerous traces converge. See Figures 6 and 7 for photos of an optimized ⎛ 435Ω Ω ⎞ layout. ⎜ 75 ⎟ Gain Error (dB) = 6dB + 20log n – 1 dB ⎜ 435 ⎟
Input Expansion
⎜ 75 + Ω Ω ⎝ 75 n – 1 ⎠⎟ In applications with more than two inputs per channel, multiple LT6555s can be connected by several different For example, two LT6555s would result in a gain error of methods. The simplest method is to connect the outputs –0.74dB per channel. Three LT6555s (i.e., six red inputs, after the 75Ω series termination, as shown in Figure 2. The six green inputs and six blue inputs), would have a gain compromise of this approach is that the internal gain error of –1.4dB. setting resistors cause a 435Ω shunt across the 75Ω cable termination, resulting in increased gain error. 1/3 LT6555 #1 IN1A 75Ω 360Ω OFF IN1A 360Ω A 75Ω V = 2 ⇒ 75Ω 435 R2 IN1B n – 1 75 360Ω Ω OFF IN1B 360Ω EN n = NUMBER OF LT6555s LT6555 #1 IN PARALLEL 1/3 LT6555 #2 CABLE IN1C 75Ω 360Ω OFF 75Ω IN1C A 360Ω V = +2 75Ω OUT IN1D 360Ω ON 75Ω IN1D 360Ω EN LT6555 #2 6555 F03 . CHIP 6555 F02 n SELECT 74HC04
Figure 3. Disabled Amplifiers Load the Cable Figure 2. Two LT6555s Build a 4-Input Router Termination with 435
Ω
Each
6555f 10