Datasheet LT1224 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Very High Speed Operational Amplifier |
| Páginas / Página | 8 / 6 — APPLICATI. S I FOR ATIO. Small Signal, AV = 1. Small Signal, AV = –1. … |
| Formato / tamaño de archivo | PDF / 217 Kb |
| Idioma del documento | Inglés |
APPLICATI. S I FOR ATIO. Small Signal, AV = 1. Small Signal, AV = –1. Offset Nulling. Layout and Passive Components
Línea de modelo para esta hoja de datos
Versión de texto del documento
LT1224
O U U W U APPLICATI S I FOR ATIO
The LT1224 may be inserted directly into HA2541, HA2544, overshoot in the unity-gain small-signal transient re- AD847, EL2020 and LM6361 applications, provided that sponse. Higher noise gain configurations exhibit less the nulling circuitry is removed. The suggested nulling overshoot as seen in the inverting gain of one response. circuit for the LT1224 is shown below.
Small Signal, AV = 1 Small Signal, AV = –1 Offset Nulling
V+ 5k 1 0.1µF 3 + 8 7 6 LT1224 2 – 4 LT1224 • TA04 0.1µF V – The large-signal responses in both inverting and non- LT1224 • TA03 inverting gain show symmetrical slewing characteristics.
Layout and Passive Components
Normally the noninverting response has a much faster rising edge than falling edge due to the rapid change in As with any high speed operational amplifier, care must be input common-mode voltage which affects the tail current taken in board layout in order to obtain maximum perfor- of the input differential pair. Slew enhancement circuitry mance. Key layout issues include: use of a ground plane, has been added to the LT1224 so that the noninverting minimization of stray capacitance at the input pins, short slew rate response is balanced. lead lengths, RF-quality bypass capacitors located close to the device (typically 0.01µF to 0.1µF), and use of low
Large Signal, AV = 1 Large Signal, AV = –1
ESR bypass capacitors for high drive current applications (typically 1µF to 10µF tantalum). Sockets should be avoided when maximum frequency performance is required, although low profile sockets can provide reasonable performance up to 50MHz. For more details see Design Note 50. Feedback resistor values greater than 5k are not recommended because a pole is formed with the input capacitance which can cause peaking. If feedback LT1224 • TA06 resistors greater than 5k are used, a parallel capacitor of 5pF to 10pF should be used to cancel the input
Input Considerations
pole and optimize dynamic performance. Resistors in series with the inputs are recommended for the LT1224 in applications where the differential input
Transient Response
voltage exceeds ±6V continuously or on a transient basis. The LT1224 gain bandwidth is 45MHz when measured at An example would be in noninverting configurations with f = 1MHz. The actual frequency response in unity-gain is high input slew rates or when driving heavy capacitive considerably higher than 45MHz due to peaking caused by loads. The use of balanced source resistance at each input a second pole beyond the unity-gain crossover. This is is recommended for applications where DC accuracy must reflected in the 50° phase margin and shows up as be maximized. 6
O U U W U APPLICATI S I FOR ATIO
The LT1224 may be inserted directly into HA2541, HA2544, overshoot in the unity-gain small-signal transient re- AD847, EL2020 and LM6361 applications, provided that sponse. Higher noise gain configurations exhibit less the nulling circuitry is removed. The suggested nulling overshoot as seen in the inverting gain of one response. circuit for the LT1224 is shown below.
Small Signal, AV = 1 Small Signal, AV = –1 Offset Nulling
V+ 5k 1 0.1µF 3 + 8 7 6 LT1224 2 – 4 LT1224 • TA04 0.1µF V – The large-signal responses in both inverting and non- LT1224 • TA03 inverting gain show symmetrical slewing characteristics.
Layout and Passive Components
Normally the noninverting response has a much faster rising edge than falling edge due to the rapid change in As with any high speed operational amplifier, care must be input common-mode voltage which affects the tail current taken in board layout in order to obtain maximum perfor- of the input differential pair. Slew enhancement circuitry mance. Key layout issues include: use of a ground plane, has been added to the LT1224 so that the noninverting minimization of stray capacitance at the input pins, short slew rate response is balanced. lead lengths, RF-quality bypass capacitors located close to the device (typically 0.01µF to 0.1µF), and use of low
Large Signal, AV = 1 Large Signal, AV = –1
ESR bypass capacitors for high drive current applications (typically 1µF to 10µF tantalum). Sockets should be avoided when maximum frequency performance is required, although low profile sockets can provide reasonable performance up to 50MHz. For more details see Design Note 50. Feedback resistor values greater than 5k are not recommended because a pole is formed with the input capacitance which can cause peaking. If feedback LT1224 • TA06 resistors greater than 5k are used, a parallel capacitor of 5pF to 10pF should be used to cancel the input
Input Considerations
pole and optimize dynamic performance. Resistors in series with the inputs are recommended for the LT1224 in applications where the differential input
Transient Response
voltage exceeds ±6V continuously or on a transient basis. The LT1224 gain bandwidth is 45MHz when measured at An example would be in noninverting configurations with f = 1MHz. The actual frequency response in unity-gain is high input slew rates or when driving heavy capacitive considerably higher than 45MHz due to peaking caused by loads. The use of balanced source resistance at each input a second pole beyond the unity-gain crossover. This is is recommended for applications where DC accuracy must reflected in the 50° phase margin and shows up as be maximized. 6