Datasheet AD8351 (Analog Devices) - 10

AD8351-EP Enhanced Product 4000 0 3500 ) 3000 –25 (Ω UDE T 2500 NI rees) AG eg 2000 –50 M SE (D 1500 A 3GHz 10MHz 10MHz DANCE PH E P 1000 –75 IM 500MHz 500MHz 3GHz WITH 50Ω 500 TERMINATIONS 0 –100 WITHOUT 10 100 1000 TERMINATIONS
-021
FREQUENCY (MHz)
821 14 024 1- 1482 Figure 22. Input Impedance vs. Frequency Figure 25. Input Reflection Coefficient vs. Frequency (RS = RL = 100 Ω With and Without 50 Ω Terminations)
160 30 150 25 ) (Ω rees) 140 20 UDE eg T (D NI SE AG A 130 15 M PH E 500MHz C N 120 10 DANCE A E P 10MHz PED IM IM 110 5 100 0 3GHz 10 100 1000
-022
FREQUENCY (MHz)
821 14 25 0 821- 14 Figure 23. Output Impedance Magnitude and Phase vs. Frequency Figure 26. Output Reflection Coefficient vs. Frequency (RS = RL = 100 Ω)
0 20 19 –2 18 17 –4 16 15 –6 14 s) 13 rees) 12 Y (p –8 A eg 11 D EL ( 10 E –10 9 P D U HAS 8 O P –12 R 7 G 6 –14 5 4 –16 3 1 –18 0 0 25 50 75 100 125 150 175 200 225 250
023
FREQUENCY (MHz)
821- 14 Figure 24. Phase and Group Delay (AV = 10 dB, at 5 V Supplies) Rev. A | Page 10 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE