Datasheet LT6604-2.5 (Analog Devices) - 10

LT6604-2.5
APPLICATIONS INFORMATION
Use Figure 4 to determine the interface between the 2.5V LT6604-2.5 and a current output DAC. The gain, or “tran- 0.1μF simpedance,” is defi ned as A = V COILCRAFT COILCRAFT NETWORK NETWORK OUT/IIN. To compute the TTWB-1010 TTWB-16A ANALYZER ANALYZER 25 transimpedance, use the following equation: 1:1 392Ω 4:1 SOURCE 4 INPUT – 402Ω 27 34 1/2 + 1580 • R1 50Ω LT6604-2.5 A = ( ) 53.6Ω 6 50Ω R ( + 1 R2) Ω 2 – + 29 402Ω 392Ω 7 0.1μF 660425 F05 By setting R1 + R2 = 1580Ω, the gain equation reduces to A = R1(Ω). The voltage at the pins of the DAC is determined –2.5V by R1, R2, the voltage on VMID and the DAC output current.
Figure 5
Consider Figure 4 with R1 = 49.9Ω and R2 = 1540Ω. The voltage at VMID, for VS = 3.3V, is 1.65V. The voltage at the 53.6Ω and 392Ω resistors satisfy the two constraints DAC pins is given by: above. The transformer converts the single-ended source R1 R1• R2 into a differential stimulus. Similarly, the output of the V = V • +I DAC MID • LT6604-2.5 will have lower distortion with larger load R1+ R IN 2 + 1580 R1+ R2 resistance yet the analyzer input is typically 50Ω. The 4:1 = mV 26 +I IN • . 48 3Ω turns (16:1 impedance) transformer and the two 402Ω resistors of Figure 5, present the output of the LT6604-2.5 CURRENT 3.3V OUTPUT with a 1600Ω differential load, or the equivalent of 800Ω 0.1μF DAC to ground at each output. The impedance seen by the 25 I – R2 IN network analyzer input is still 50Ω, reducing refl ections in 4 – 34 1/2 + 27 V + OUT the cabling between the transformer and analyzer input. R1 LT6604-2.5 0.01μF 6 I + IN 2 – V – OUT
Differential and Common Mode Voltage Ranges
+ 29 660425 F04 R2 R1 7 V + – OUT – VOUT 1580 • R1 The rail-to-rail output stage of the LT6604-2.5 can process = I + – IN – IIN R1 + R2 large differential signal levels. On a 3V supply, the output signal can be 5.1V
Figure 4
P-P. Similarly, a 5V supply can support signals as large as 8.8VP-P. To prevent excessive power
Evaluating the LT6604-2.5
dissipation in the internal circuitry, the user must limit differential signal levels to 9VP-P. The low impedance levels and high frequency operation of the LT6604-2.5 require some attention to the imped- The two amplifi ers inside the LT6604-2.5 channel have ance matching networks between the LT6604-2.5 and independent control of their output common mode voltage other devices. The previous examples assume an ideal (see the “Block Diagram” section). The following guidelines (0Ω) source impedance and a large (1k) load resistance. will optimize the performance of the fi lter. Among practical examples where impedance must be VMID can be allowed to fl oat, but it must be bypassed to considered is the evaluation of the LT6604-2.5 with a an AC ground with a 0.01μF capacitor or instability may network analyzer. be observed. VMID can be driven from a low impedance Figure 5 is a laboratory setup that can be used to char- source, provided it remains at least 1.5V above V– and at acterize the LT6604-2.5 using single-ended instruments least 1.5V below V+. An internal resistor divider sets the with 50Ω source impedance and 50Ω input impedance. voltage of VMID. While the internal 11k resistors are well For a 12dB gain confi guration the LT6604-2.5 requires a matched, their absolute value can vary by ±20%. This 402Ω source resistance yet the network analyzer output is should be taken into consideration when connecting an calibrated for a 50Ω load resistance. The 1:1 transformer, external resistor network to alter the voltage of VMID. 660425fa 10