Datasheet LT3433 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | High Voltage Step-Up/Step-Down DC/DC Converter |
| Páginas / Página | 16 / 5 — TYPICAL PERFOR A CE CHARACTERISTICS. Switch Resistance. VBST Supply … |
| Formato / tamaño de archivo | PDF / 244 Kb |
| Idioma del documento | Inglés |
TYPICAL PERFOR A CE CHARACTERISTICS. Switch Resistance. VBST Supply Switch Drive Current. VOUT Supply Switch Drive Current
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LT3433
W U TYPICAL PERFOR A CE CHARACTERISTICS Switch Resistance VBST Supply Switch Drive Current VOUT Supply Switch Drive Current vs Temperature (I vs Temperature (I SW = 500mA) SW = 500mA) vs Temperature (ISW = 500mA)
1.1 40 40 1.0 ) Ω 37 37 0.9 RSWH 34 34 0.8 (mA/A) (mA/A) SW SW/I 0.7 /I 31 31 RSWL I BST I VOUT 0.6 SWITCH ON RESISTANCE ( 28 28 0.5 0.4 25 25 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3433 G12 3433 G13 3433 G14
U U U PI FU CTIO S SGND (Pins 1, 8, 9, 16):
Low Noise Ground Reference. the switch transistor.This pin also supplies power to most of the IC’s internal circuitry if the VBIAS pin is not driven
VBST (Pin 2):
Boosted Switch Supply. This “boosted” sup- externally. This supply will be subject to high switching ply rail is referenced to the SW_H pin. Supply voltage is transient currents so this pin requires a high quality bypass maintained by a bootstrap capacitor tied from the VBST pin capacitor that meets whatever application-specific input to the SW_H pin. A 1µF capacitor is generally adequate for ripple current requirements exist. most applications.
BURST_EN (Pin 5):
Burst Mode Enable/Disable. When The charge on the bootstrap capacitor is refreshed through this pin is below 0.3V, Burst Mode operation is enabled. a diode, typically connected from the converter output Pin input bias current < 1µA when Burst Mode operation (VOUT), during the switch-off period. Minimum off-time is enabled. If Burst Mode operation is not desired, pulling operation assures that the boost capacitor is refreshed each this pin above 2V will disable the burst function. When switch cycle. The LT3433 supports operational VBST sup- Burst Mode operation is disabled, typical pin input current ply voltages up to 75V (absolute maximum) as referenced = 35µA. BURST_EN should not be pulled above 20V. This to ground. pin is typically shorted to SGND for Burst Mode function,
SW_H (Pin 3):
Boosted Switch Output. This is the current or connected to either VBIAS or VOUT to disable Burst Mode return for the boosted switch and corresponds to the emitter operation. of the switch transistor. The boosted switch shorts the
VC (Pin 6):
Error Amplifier Output. The voltage on the VC SW_H pin to the VIN supply when enabled. The drive cir- pin corresponds to the maximum switch current per oscil- cuitry for this switch is boosted above the VIN supply lator cycle. The error amplifier is typically configured as an through the VBST pin, allowing saturation of the switch for integrator circuit by connecting an RC network from this maximum efficiency. The “ON” resistance of the boosted pin to ground. This circuit typically creates the dominant switch is 0.8Ω. pole for the converter regulation feedback loop. Specific in-
VIN (Pin 4):
Input Power Supply. This pin supplies power tegrator characteristics can be configured to optimize tran- to the boosted switch and corresponds to the collector of sient response. See Applications Information. 3433f 5
W U TYPICAL PERFOR A CE CHARACTERISTICS Switch Resistance VBST Supply Switch Drive Current VOUT Supply Switch Drive Current vs Temperature (I vs Temperature (I SW = 500mA) SW = 500mA) vs Temperature (ISW = 500mA)
1.1 40 40 1.0 ) Ω 37 37 0.9 RSWH 34 34 0.8 (mA/A) (mA/A) SW SW/I 0.7 /I 31 31 RSWL I BST I VOUT 0.6 SWITCH ON RESISTANCE ( 28 28 0.5 0.4 25 25 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 3433 G12 3433 G13 3433 G14
U U U PI FU CTIO S SGND (Pins 1, 8, 9, 16):
Low Noise Ground Reference. the switch transistor.This pin also supplies power to most of the IC’s internal circuitry if the VBIAS pin is not driven
VBST (Pin 2):
Boosted Switch Supply. This “boosted” sup- externally. This supply will be subject to high switching ply rail is referenced to the SW_H pin. Supply voltage is transient currents so this pin requires a high quality bypass maintained by a bootstrap capacitor tied from the VBST pin capacitor that meets whatever application-specific input to the SW_H pin. A 1µF capacitor is generally adequate for ripple current requirements exist. most applications.
BURST_EN (Pin 5):
Burst Mode Enable/Disable. When The charge on the bootstrap capacitor is refreshed through this pin is below 0.3V, Burst Mode operation is enabled. a diode, typically connected from the converter output Pin input bias current < 1µA when Burst Mode operation (VOUT), during the switch-off period. Minimum off-time is enabled. If Burst Mode operation is not desired, pulling operation assures that the boost capacitor is refreshed each this pin above 2V will disable the burst function. When switch cycle. The LT3433 supports operational VBST sup- Burst Mode operation is disabled, typical pin input current ply voltages up to 75V (absolute maximum) as referenced = 35µA. BURST_EN should not be pulled above 20V. This to ground. pin is typically shorted to SGND for Burst Mode function,
SW_H (Pin 3):
Boosted Switch Output. This is the current or connected to either VBIAS or VOUT to disable Burst Mode return for the boosted switch and corresponds to the emitter operation. of the switch transistor. The boosted switch shorts the
VC (Pin 6):
Error Amplifier Output. The voltage on the VC SW_H pin to the VIN supply when enabled. The drive cir- pin corresponds to the maximum switch current per oscil- cuitry for this switch is boosted above the VIN supply lator cycle. The error amplifier is typically configured as an through the VBST pin, allowing saturation of the switch for integrator circuit by connecting an RC network from this maximum efficiency. The “ON” resistance of the boosted pin to ground. This circuit typically creates the dominant switch is 0.8Ω. pole for the converter regulation feedback loop. Specific in-
VIN (Pin 4):
Input Power Supply. This pin supplies power tegrator characteristics can be configured to optimize tran- to the boosted switch and corresponds to the collector of sient response. See Applications Information. 3433f 5