Datasheet LTC3866 (Analog Devices) - 9

LTC3866
pin FuncTions (FE/UF) PGND (Pin 14/Pin 11):
Power Ground. Connect to the
EXTVCC (Pin 21/Pin 18):
External Supply Voltage Input. source of the bottom N-channel MOSFET and the negative Whenever an external voltage supply greater than 4.7V terminals of the VIN and INTVCC decoupling capacitors is connected to this pin, an internal switch will close and close to this pin. bypass the internal low dropout regulator, and the external
BG (Pin 15/Pin 12):
Bottom Gate Driver Output. This pin supply will power the IC. Do not exceed 6V on this pin and drives the gate of the bottom N-channel MOSFET and ensure VIN > VEXTVCC at all times. swings between INTVCC or EXTVCC and PGND.
ITEMP (Pin 22/Pin 19):
Temperature DCR Compensation
SW (Pin 16/Pin 13):
Switch Node Connection. Connect Input. Connect to a NTC (negative tempco) resistor placed this pin to the output filter inductor, bottom N-channel near the output inductor to compensate for its DCR change MOSFET drain and top N-channel MOSFET source. Voltage over temperature. Floating this pin or tying it to INTVCC swing at these pins is from a Schottky diode (external) disables the DCR temperature compensation function. voltage drop below ground to VIN.
PGOOD (Pin 23/Pin 20):
Power Good Indicator Output.
TG (Pin 17/Pin 14):
Top Gate Driver Output. This is a float- Open-drain logic out that is pulled to ground when the ing driver to be connected to the gate of the top N-channel output exceeds the 10% regulation window, after the MOSFET. The voltage swing of this pin equals to INTV internal 20μs power bad mask timer expires. CC superimposed over the switch node (SW) voltage.
MODE/PLLIN (Pin24/Pin 21):
Mode Operation or External
BOOST (Pin 18/Pin 15):
Boosted Top Gate Driver Supply. Clock Synchronization. Connect this pin to SGND to set The (+) terminal of the booststrap capacitor connects to the continuous mode of operation. Connect to INTVCC to this pin. This pins swings from a diode voltage drop below enable pulse-skipping mode of operation. Leaving the pin INTV floating will enable Burst Mode operation. A clock signal CC up to VIN + INTVCC. applied to the pin will force the controller into continuous
INTVCC (Pin 19/Pin 16):
Internal 5.5V Regulator Output. mode of operation and synchronizes the internal oscillator. The internal control circuits are powered from this voltage. Decouple this pin to PGND with a 4.7μF low ESR tantalum
SGND (Exposed Pad Pin 25/ Exposed Pad Pin 25):
Sig- or ceramic capacitor. nal Ground. This is the ground of the controller. Connect compensation components and output setting resistors
VIN (Pin 20/Pin 17):
Main Input Supply. Decouple this pin to this ground. The exposed pad must be soldered to the to PGND with a capacitor (0.1μF to 1μF). For applications PCB ground plane. where the main input power is 5V, tie the VIN and INTVCC pins together. 3866fc For more information www.linear.com/LTC3866 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts