LTC3864 operaTionMain Control Loop (Refer to Functional Diagram)Shutdown and Soft-Start The LTC3864 uses a peak current-mode control architec- When the RUN pin is below 0.7V, the controller and most ture to regulate the output in an asynchronous step-down internal circuits are disabled. In this micropower shutdown DC/DC switching regulator. The VFB input is compared to state, the LTC3864 draws only 7µA. Releasing the RUN an internal reference by a transconductance error ampli- pin allows a small internal pull up current to pull the RUN fier (EA). The internal reference can be either a fixed 0.8V pin above 1.26V and enable the controller. The RUN pin reference VREF or the voltage input on the SS pin. In normal can be pulled up to an external supply of up to 60V or it operation VFB regulates to the internal 0.8V reference can be driven directly by logic levels. voltage. In soft-start or tracking mode, when the SS pin The start-up of the output voltage V voltage is less than the internal 0.8V reference voltage, OUT is controlled by the voltage on the SS pin. When the voltage on the SS VFB will regulate to the SS pin voltage. The error amplifier pin is less than the 0.8V internal reference, the V output connects to the ITH (current [I] threshold [TH]) FB pin is regulated to the voltage on the SS pin. This allows the SS pin. The voltage level on the ITH pin is then summed with pin to be used to program a soft-start by connecting an a slope compensation ramp to create the peak inductor external capacitor from the SS pin to signal ground. An current set point. internal 10µA pull-up current charges this capacitor, creat- The peak inductor current is measured through a sense ing a voltage ramp on the SS pin. As the SS voltage rises resistor RSENSE placed across the VIN and SENSE pins. from 0V to 0.8V, the output voltage VOUT rises smoothly The resultant differential voltage from VIN to SENSE is from zero to its final value. proportional to the inductor current and is compared to the Alternatively, the SS pin can be used to cause the start- peak inductor current set point. During normal operation up of V the P-channel power MOSFET is turned on when the clock OUT to track that of another supply. Typically, this requires connecting the SS pin to an external resistor leading edge sets the SR latch through the S input. The divider from the other supply to ground. (See Applications P-channel MOSFET is turned off through the SR latch R Information section.) Under shutdown or UVLO, the SS input when the differential voltage from VIN to SENSE is pin is pulled to ground and prevented from ramping up. greater than the peak inductor current set point and the current comparator, ICMP, trips high. If the slew rate of the SS pin is greater than 1.2V/ms, the output will track an internal soft-start ramp instead of the Power CAP and VIN Undervoltage Lockout (UVLO) SS pin. The internal soft-start will guarantee a smooth Power for the P-channel MOSFET gate driver is derived start-up of the output under all conditions, including in the from the CAP pin. The CAP pin is regulated to 8V below case of a short-circuit recovery where the output voltage V will recover from near ground. IN in order to provide efficient P-channel operation. The power for the VCAP supply comes from an internal LDO, Light Load Current Operation (Burst Mode Operation which regulates the VIN-CAP differential voltage. A mini- or Pulse-Skipping Mode) mum capacitance of 0.47µF (low ESR ceramic) is required between VIN and CAP to assure stability. The LTC3864 can be enabled to enter high efficiency Burst Mode operation or pulse-skipping mode at light loads. To For VIN ≤ 8V, the LDO will be in dropout and the CAP volt- select pulse-skipping operation, tie the PLLIN/MODE pin age will be at ground, i.e. the VIN-CAP differential voltage to signal ground. To select Burst Mode operation, float will equal VIN. If VIN-CAP is less than 3.25V (typical), the the PLLIN/MODE pin. LTC3864 enters a UVLO state where the GATE is prevented from switching and most internal circuitry is shut down. In Burst Mode operation, if the VFB is higher than the refer- In order to exit UVLO, the VIN-CAP voltage would have to ence voltage, the error amplifier will decrease the voltage exceed 3.5V (typical). on the ITH pin. When the ITH voltage drops below 0.425V, 3864fa 10 For more information www.linear.com/LTC3864 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts