Datasheet LT3840 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | Wide Input Range Synchronous Regulator Controller with Accurate Current Limit |
| Páginas / Página | 24 / 7 — pin FuncTions (TSSOP/QFN) AUXSW1 (Pin 1/Pin 36):. OVLO (Pin 11/Pin 12):. … |
| Formato / tamaño de archivo | PDF / 292 Kb |
| Idioma del documento | Inglés |
pin FuncTions (TSSOP/QFN) AUXSW1 (Pin 1/Pin 36):. OVLO (Pin 11/Pin 12):. PGND (Pin 2/Pin 38):. UVLO (Pin 12/Pin 13):
Línea de modelo para esta hoja de datos
Versión de texto del documento
LT3840
pin FuncTions (TSSOP/QFN) AUXSW1 (Pin 1/Pin 36):
AUXSW1 is a switching node of
OVLO (Pin 11/Pin 12):
OVLO has a precision threshold the auxiliary bias supply. Connect the pin to the auxiliary with hysteresis to implement an accurate overvoltage bias supply inductor. lockout (OVLO). Controller switching is disabled during
PGND (Pin 2/Pin 38):
PGND is the high current ground an overvoltage lockout (OVLO) event. INTVCC regulation return for the auxiliary bias supply. Connect PGND to the is maintained during an OVLO event. Connect the pin to negative terminal of the INTV GND to disable the function. CC decoupling capacitor and to system ground.
UVLO (Pin 12/Pin 13):
UVLO has a precision threshold
AUXVIN (Pin 3/Pin 1):
AUXVIN is the supply pin to the with hysteresis to implement an accurate undervoltage auxiliary bias supply. Bypass the pin with a low ESR ca- lockout (UVLO). UVLO enables the controller switching. pacitor placed close to the pin and referenced to PGND. Connect the pin to VIN to disable the function.
SYNC (Pin 4/Pin 3):
SYNC allows the LT3840 switching
EN (Pin 13/Pin 14):
EN has a precision IC enable threshold frequency to be synchronized to an external clock. Set with hysteresis. EN enables the auxiliary bias supply and the R controller switching. Connect the pin to VIN to disable the T resistor such that the internal oscillator frequency is 15% below the minimum external clock frequency. If function. EN also has a lower threshold to put the LT3840 unused connect the SYNC pin to GND. into a low current shutdown mode where all internal cir- cuitry is disabled.
RT (Pin 5/Pin 4):
An external resistor on RT sets the switching frequency of the synchronous controller and
VIN (Pin 14/Pin 15):
VIN provides an internal DC bias rail auxiliary bias supply. and should be decoupled to GND with a low value (0.1µF), low ESR capacitor located close to the pin.
TK/SS (Pin 6/Pin 6):
TK/SS is the LT3840 external tracking and soft-start input. The LT3840 regulates the V
GND (Pin 15, Exposed Pad Pin 29/Pin 17, Exposed Pad
FB voltage to the smaller of the internal reference or the voltage on the
Pin 39):
Ground. Solder GND and the exposed pad directly TK/SS pin. An internal pull-up current source is connected to the PCB ground plane. to this pin. A capacitor (CSS) to ground sets the ramp rate.
IMON (Pin 16/Pin 18):
The voltage on IMON represents Alternatively, a resistor divider on another voltage supply the average output current of the converter. A small value connected to this pin allows the LT3840 output to track capacitor filters the ripple voltage associated with the another supply during start-up. Leave the pin open if the inductor ripple current. tracking and soft-start functions are unused.
ICTRL (Pin 17/Pin 19):
The maximum average output
FB (Pin 7/Pin 7):
The regulator output voltage is set with current is programmed with a voltage applied to ICTRL. a resistor divider connected to FB. FB is also the input If unused, leave floating. for the output overvoltage and power good comparators.
ICOMP (Pin 18/Pin 20):
A capacitor and resistor connected
VC (Pin 8/Pin 8):
VC is the compensation node for the to ICOMP compensates the average current limit circuit. output voltage regulation control loop.
SENSE+ (Pin 19/Pin 21):
SENSE+ is the positive input for
PG (Pin 9/Pin 9):
PG is a power good pin and is the open- the differential current sense comparator. drain output of an internal comparator.
SENSE– (Pin 20/Pin 22):
SENSE– is the negative input for
MODE (Pin 10/Pin 11):
MODE is used to enable or disable the differential current sense comparator. Burst Mode operation. Connect MODE to ground for Burst
SW (Pin 21/Pin 24):
SW is the high current return path Mode operation. Connect the pin to FB for pulse-skipping of the TG MOSFET driver and is externally connected to mode. Connect MODE to INTVCC for continuous mode. the negative terminal of the BOOST capacitor. 3840fa For more information www.linear.com/LT3840 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions (TSSOP/QFN) AUXSW1 (Pin 1/Pin 36):
AUXSW1 is a switching node of
OVLO (Pin 11/Pin 12):
OVLO has a precision threshold the auxiliary bias supply. Connect the pin to the auxiliary with hysteresis to implement an accurate overvoltage bias supply inductor. lockout (OVLO). Controller switching is disabled during
PGND (Pin 2/Pin 38):
PGND is the high current ground an overvoltage lockout (OVLO) event. INTVCC regulation return for the auxiliary bias supply. Connect PGND to the is maintained during an OVLO event. Connect the pin to negative terminal of the INTV GND to disable the function. CC decoupling capacitor and to system ground.
UVLO (Pin 12/Pin 13):
UVLO has a precision threshold
AUXVIN (Pin 3/Pin 1):
AUXVIN is the supply pin to the with hysteresis to implement an accurate undervoltage auxiliary bias supply. Bypass the pin with a low ESR ca- lockout (UVLO). UVLO enables the controller switching. pacitor placed close to the pin and referenced to PGND. Connect the pin to VIN to disable the function.
SYNC (Pin 4/Pin 3):
SYNC allows the LT3840 switching
EN (Pin 13/Pin 14):
EN has a precision IC enable threshold frequency to be synchronized to an external clock. Set with hysteresis. EN enables the auxiliary bias supply and the R controller switching. Connect the pin to VIN to disable the T resistor such that the internal oscillator frequency is 15% below the minimum external clock frequency. If function. EN also has a lower threshold to put the LT3840 unused connect the SYNC pin to GND. into a low current shutdown mode where all internal cir- cuitry is disabled.
RT (Pin 5/Pin 4):
An external resistor on RT sets the switching frequency of the synchronous controller and
VIN (Pin 14/Pin 15):
VIN provides an internal DC bias rail auxiliary bias supply. and should be decoupled to GND with a low value (0.1µF), low ESR capacitor located close to the pin.
TK/SS (Pin 6/Pin 6):
TK/SS is the LT3840 external tracking and soft-start input. The LT3840 regulates the V
GND (Pin 15, Exposed Pad Pin 29/Pin 17, Exposed Pad
FB voltage to the smaller of the internal reference or the voltage on the
Pin 39):
Ground. Solder GND and the exposed pad directly TK/SS pin. An internal pull-up current source is connected to the PCB ground plane. to this pin. A capacitor (CSS) to ground sets the ramp rate.
IMON (Pin 16/Pin 18):
The voltage on IMON represents Alternatively, a resistor divider on another voltage supply the average output current of the converter. A small value connected to this pin allows the LT3840 output to track capacitor filters the ripple voltage associated with the another supply during start-up. Leave the pin open if the inductor ripple current. tracking and soft-start functions are unused.
ICTRL (Pin 17/Pin 19):
The maximum average output
FB (Pin 7/Pin 7):
The regulator output voltage is set with current is programmed with a voltage applied to ICTRL. a resistor divider connected to FB. FB is also the input If unused, leave floating. for the output overvoltage and power good comparators.
ICOMP (Pin 18/Pin 20):
A capacitor and resistor connected
VC (Pin 8/Pin 8):
VC is the compensation node for the to ICOMP compensates the average current limit circuit. output voltage regulation control loop.
SENSE+ (Pin 19/Pin 21):
SENSE+ is the positive input for
PG (Pin 9/Pin 9):
PG is a power good pin and is the open- the differential current sense comparator. drain output of an internal comparator.
SENSE– (Pin 20/Pin 22):
SENSE– is the negative input for
MODE (Pin 10/Pin 11):
MODE is used to enable or disable the differential current sense comparator. Burst Mode operation. Connect MODE to ground for Burst
SW (Pin 21/Pin 24):
SW is the high current return path Mode operation. Connect the pin to FB for pulse-skipping of the TG MOSFET driver and is externally connected to mode. Connect MODE to INTVCC for continuous mode. the negative terminal of the BOOST capacitor. 3840fa For more information www.linear.com/LT3840 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts