Datasheet LT8616 (Analog Devices) - 9

FabricanteAnalog Devices
DescripciónDual 42V Synchronous Monolithic Step-Down Regulator with 6.5μA Quiescent Current
Páginas / Página26 / 9 — PIN FUNCTIONS BIAS:. SW1, SW2:. SYNC/MODE:. BOOST1, BOOST2:. EN/UV1, …
Formato / tamaño de archivoPDF / 444 Kb
Idioma del documentoInglés

PIN FUNCTIONS BIAS:. SW1, SW2:. SYNC/MODE:. BOOST1, BOOST2:. EN/UV1, EN/UV2:. TR/SS1, TR/SS2:. FB1, FB2:. GND:. INTV. CC:. VIN1:. NC:. VIN2:

PIN FUNCTIONS BIAS: SW1, SW2: SYNC/MODE: BOOST1, BOOST2: EN/UV1, EN/UV2: TR/SS1, TR/SS2: FB1, FB2: GND: INTV CC: VIN1: NC: VIN2:

Línea de modelo para esta hoja de datos

Versión de texto del documento

LT8616
PIN FUNCTIONS BIAS:
The BIAS pin supplies the internal regulator when tied
SW1, SW2:
The SW pins are the outputs of each chan- to a voltage higher than 3.1V. For output voltages of 3.3V nel's internal power switches. Connect these pins to the and above this pin should be tied to the appropriate VOUT. inductors and boost capacitors. SW nodes should be kept Connect a 1µF bypass capacitor to this pin if it is connected small on the PCB for good performance. to a supply other than VOUT1 or VOUT2. Ground if unused.
SYNC/MODE:
Ground the SYNC/MODE pin for low ripple
BOOST1, BOOST2:
The BOOST pins are used to provide Burst Mode operation at low output loads. Tie to a clock drive voltages, higher than the input voltage, to the internal source for synchronization to an external frequency. Apply topside power switches. Place 0.1µF capacitors between a DC voltage of 2.4V or higher or tie to INTVCC for pulse- BOOST and its corresponding SW pin as close as possible skipping mode. When in pulse-skipping mode, the IQ will to the IC. BOOST nodes should be kept small on the PCB increase to several hundred μA. Channel 1 will align its for good performance. positive switching edge to the positive edge of the external
EN/UV1, EN/UV2:
The EN/UV pins are used to indepen- clock and channel 2 will align its positive switching edge dently disable each channel when pulled low and enable to the negative external clock edge. Do not float this pin. when pulled high. The hysteretic threshold voltage is 1.03V
TR/SS1, TR/SS2:
The TR/SS pins are used to soft-start going up and 0.98V going down. Tie to VIN supply if the the two channels, to allow one channel to track the other shutdown feature is not used. External resistor dividers output, or to allow both channels to track another output. from VIN can be used to program thresholds below which For tracking, tie a resistor divider to the TR/SS pin from each channel is disabled. Don’t float these pins. the tracked output. For soft-start, tie a capacitor to TR/
FB1, FB2:
The FB pins are regulated to 0.790V. Connect SS. Internal 2μA pull-up currents from INTVCC charge the feedback resistor divider taps to the FB pins. Also soft-start capacitors to create voltage ramps. A TR/SS connect phase lead capacitors between FB pins and V voltage below 0.79V forces the LT8616 to regulate the OUT nodes. Typical phase lead capacitors are 1.5pF to 10pF. corresponding FB pins to equal the TR/SS pin voltage. When TR/SS voltages are above 0.79V, the tracking func-
GND:
The GND pins and exposed pad must be con- tion is disabled and the internal reference resumes control nected to the negative terminal of the input capacitors of the error amplifiers. TR/SS pins are individually pulled and soldered to the PCB in order to lower the thermal to ground with internal 250Ω MOSFETs during shutdown resistance. and fault conditions; use series resistors if driving from
INTV
a low impedance output.
CC:
The INTVCC pin provides power to internal gate drivers and control circuits. INTVCC current will be sup-
VIN1:
VIN1 supplies current to the LT8616's internal circuitry plied from BIAS if VBIAS > 3.1V, otherwise current will be and to channel 1's topside power switch. This pin must drawn from VIN1. Decouple this pin to ground with at least be locally bypassed. Be sure to place the positive terminal a 1μF low ESR ceramic capacitor. Do not load the INTVCC of the input capacitor as close as possible to the pin, and pin with external circuitry. the negative capacitor terminal as close as possible to the
NC:
The NC pins have no internal connection. Float NC GND pins. VIN1 must be connected to 3.4V or above even pins to increase fault tolerance or connect to ground to if only channel 2 is in use. facilitate PCB layout.
VIN2:
VIN2 supplies current to internal channel 2's topside
PG1, PG2:
The PG pins are the open-drain outputs of the power switch. This pin must be locally bypassed. Be sure internal power good comparators. Each channel's PG pin to place the positive terminal of the input capacitor as close remains low until the respective FB pin is within ±10% of as possible to the pin, and the negative capacitor terminal the final regulation voltage and there are no fault conditions. as close as possible to the GND pins. Please note VIN1 must be 3.4V or above to operate channel 2.
RT:
A resistor is tied between RT and ground to set the switching frequency. 8616fa For more information www.linear.com/LT8616 9