Datasheet LTC3870-1 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | PolyPhase Step-Down Slave Controller for Digital Power System Management |
| Páginas / Página | 20 / 6 — pin FuncTions ISENSE0+/ISENSE1+ (Pin 1/Pin 6):. PHASMD (Pin 11):. … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
pin FuncTions ISENSE0+/ISENSE1+ (Pin 1/Pin 6):. PHASMD (Pin 11):. SENSE0−/ISENSE1− (Pin 2/Pin 5):. PWM0/PWM1 (Pin 19/Pin 12):
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LTC3870-1
pin FuncTions ISENSE0+/ISENSE1+ (Pin 1/Pin 6):
Current Sense Comparator
PHASMD (Pin 11):
Phase Set Pin. This pin can be tied to positive inputs, normally connected to the positive node GND, INTVCC or a resistor divider from INTVCC to GND. This of the DCR sensing networks or current sensing resistors. pin determines the relative phases between the external
I
clock on the SYNC pin and the internal controllers. See
SENSE0−/ISENSE1− (Pin 2/Pin 5):
Current Sense Comparator negative inputs, normally connected to the negative node Table 1 in the Operation Section for details. of the DCR sensing network or current sensing resistors.
PWM0/PWM1 (Pin 19/Pin 12):
(Top) Gate Signal Outputs.
RUN0/RUN1 (Pin 3/Pin 4):
Enable Run Input Pins. A logic This signal goes to the PWM or top gate input of the external high on these pins enables the corresponding channel. driver, integrated driver MOSFET or Power Block. This is In multiphase operation, these pins are connected to a three-state compatible output. To support three-state LTC3887-1's RUN pins. mode, an external resistive divider is typically used from VCC0/VCC1 to ground.
MODE0/MODE1 (Pin 24/Pin 7):
DCM/CCM Mode Control Pins. Channel0/Channel1 operate in forced continuous
VCC0/VCC1 (Pin 18/Pin 13):
PWM Pin Driver Supplies. mode if MODE0/MODE1 pin is logic high. There is a 500kΩ Decouple these pins to GND with a capacitor (0.1µF) or tie pull-down resistor on MODE0/MODE1 internally. The these pins to the INTVCC pin. PWM0/PWM1 signal swing default operation mode in each channel is discontinuous is from ground to VCC0/VCC1. mode operation unless these pins are actively driven high.
INTVCC (Pin 14):
Internal Regulator 5V Output. The internal
I
control circuits are powered from this voltage. Bypass this
TH0/ITH1 (Pin 23/Pin 8):
Current Control Threshold. Each associated channel’s current comparator tripping pin to GND with a minimum of 4.7µF low ESR tantalum threshold increases with its I or ceramic capacitor. INTVCC is enabled as soon as VIN TH voltage. In multiphase operation, these pins are connected to the master con- is powered. The INTVCC pin is not short circuit proof. If troller's I overloaded, this will disrupt internal operation that can TH pins for current sharing. damage the part.
ILIM (Pin 9):
Programs Current Comparators' Sense Voltage Range. This pin can be tied to GND or INTV
EXTVCC (Pin 15):
External power input to an internal LDO CC to select the maximum current sense threshold for each connected to INTVCC. This LDO supplies INTVCC power current comparator. GND sets both channels' current low bypassing the internal LDO powered from VIN whenever range with maximum 50mV sensing voltage. INTV EXTVCC is higher than 4.8V. See EXTVCC connection in the CC sets both channels' current high range with maximum 75mV Applications Information Section. Do not exceed 14V on sensing voltage. For equal current sharing, the setup on this pin. Bypass this pin to GND with a minimum of 4.7µF the I low ESR tantalum or ceramic capacitor. If the EXTVCC pin LIM pin has to be same as the setup on the bit 7 of MFR_PWM_MODE_3887-1 register in the master control- is not used, leave it open or tie it to ground. EXTVCC can ler. See Table 2 in the Operation Section for details. be present before VIN. However, EXTVCC is enabled only if VIN is higher than 6.5V.
SYNC (Pin 10):
External Clock Synchronization Input. If an external clock is present at this pin, the switching frequency
GND (Pin 16/Exposed Pad Pin 25):
Signal ground. All will be synchronized to the falling edge of the external small-signal and compensation components should con- clock. In multiphase operation, this pin is connected to nect to this ground. The exposed pad must be soldered LTC3887-1 SYNC pin for frequency synchronization. Do not float the SYNC Pin. 38701f 6 For more information www.linear.com/LTC3870-1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
pin FuncTions ISENSE0+/ISENSE1+ (Pin 1/Pin 6):
Current Sense Comparator
PHASMD (Pin 11):
Phase Set Pin. This pin can be tied to positive inputs, normally connected to the positive node GND, INTVCC or a resistor divider from INTVCC to GND. This of the DCR sensing networks or current sensing resistors. pin determines the relative phases between the external
I
clock on the SYNC pin and the internal controllers. See
SENSE0−/ISENSE1− (Pin 2/Pin 5):
Current Sense Comparator negative inputs, normally connected to the negative node Table 1 in the Operation Section for details. of the DCR sensing network or current sensing resistors.
PWM0/PWM1 (Pin 19/Pin 12):
(Top) Gate Signal Outputs.
RUN0/RUN1 (Pin 3/Pin 4):
Enable Run Input Pins. A logic This signal goes to the PWM or top gate input of the external high on these pins enables the corresponding channel. driver, integrated driver MOSFET or Power Block. This is In multiphase operation, these pins are connected to a three-state compatible output. To support three-state LTC3887-1's RUN pins. mode, an external resistive divider is typically used from VCC0/VCC1 to ground.
MODE0/MODE1 (Pin 24/Pin 7):
DCM/CCM Mode Control Pins. Channel0/Channel1 operate in forced continuous
VCC0/VCC1 (Pin 18/Pin 13):
PWM Pin Driver Supplies. mode if MODE0/MODE1 pin is logic high. There is a 500kΩ Decouple these pins to GND with a capacitor (0.1µF) or tie pull-down resistor on MODE0/MODE1 internally. The these pins to the INTVCC pin. PWM0/PWM1 signal swing default operation mode in each channel is discontinuous is from ground to VCC0/VCC1. mode operation unless these pins are actively driven high.
INTVCC (Pin 14):
Internal Regulator 5V Output. The internal
I
control circuits are powered from this voltage. Bypass this
TH0/ITH1 (Pin 23/Pin 8):
Current Control Threshold. Each associated channel’s current comparator tripping pin to GND with a minimum of 4.7µF low ESR tantalum threshold increases with its I or ceramic capacitor. INTVCC is enabled as soon as VIN TH voltage. In multiphase operation, these pins are connected to the master con- is powered. The INTVCC pin is not short circuit proof. If troller's I overloaded, this will disrupt internal operation that can TH pins for current sharing. damage the part.
ILIM (Pin 9):
Programs Current Comparators' Sense Voltage Range. This pin can be tied to GND or INTV
EXTVCC (Pin 15):
External power input to an internal LDO CC to select the maximum current sense threshold for each connected to INTVCC. This LDO supplies INTVCC power current comparator. GND sets both channels' current low bypassing the internal LDO powered from VIN whenever range with maximum 50mV sensing voltage. INTV EXTVCC is higher than 4.8V. See EXTVCC connection in the CC sets both channels' current high range with maximum 75mV Applications Information Section. Do not exceed 14V on sensing voltage. For equal current sharing, the setup on this pin. Bypass this pin to GND with a minimum of 4.7µF the I low ESR tantalum or ceramic capacitor. If the EXTVCC pin LIM pin has to be same as the setup on the bit 7 of MFR_PWM_MODE_3887-1 register in the master control- is not used, leave it open or tie it to ground. EXTVCC can ler. See Table 2 in the Operation Section for details. be present before VIN. However, EXTVCC is enabled only if VIN is higher than 6.5V.
SYNC (Pin 10):
External Clock Synchronization Input. If an external clock is present at this pin, the switching frequency
GND (Pin 16/Exposed Pad Pin 25):
Signal ground. All will be synchronized to the falling edge of the external small-signal and compensation components should con- clock. In multiphase operation, this pin is connected to nect to this ground. The exposed pad must be soldered LTC3887-1 SYNC pin for frequency synchronization. Do not float the SYNC Pin. 38701f 6 For more information www.linear.com/LTC3870-1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts