Datasheet LTC3895 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | 150V Low IQ, Synchronous Step-Down DC/DC Controller |
| Páginas / Página | 38 / 10 — pin FuncTions FREQ (Pin 17):. NDRV (Pin 28):. IN (Pin 30):. DRVSET (Pin … |
| Formato / tamaño de archivo | PDF / 2.3 Mb |
| Idioma del documento | Inglés |
pin FuncTions FREQ (Pin 17):. NDRV (Pin 28):. IN (Pin 30):. DRVSET (Pin 18):. EXTV. CC (Pin 32):. DRVUV (Pin 19):. RUN (Pin 34):
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LTC3895
pin FuncTions FREQ (Pin 17):
Frequency Control Pin for the Internal VCO.
NDRV (Pin 28):
Drive Output for External Pass Device Connecting the pin to GND forces the VCO to a fixed low of the NDRV LDO Linear Regulator for DRVCC. Connect frequency of 350kHz. Connecting the pin to INTVCC forces this pin to the gate of an external NMOS pass device. An the VCO to a fixed high frequency of 535kHz. Other fre- internal charge pump allows NDRV to regulate above VIN quencies between 50kHz and 900kHz can be programmed for low dropout performance. To disable this external by using a resistor between FREQ and GND. An internal NDRV LDO, tie NDRV to DRVCC. 20µA pull-up current develops the voltage to be used by
V
the VCO to control the frequency.
IN (Pin 30):
Main Supply Pin. A bypass capacitor should be tied between this pin and the GND pins.
DRVSET (Pin 18):
DRVCC Regulation Program Pin. This
EXTV
pin sets the regulated output voltage of the DRV
CC (Pin 32):
External Power Input to an Internal LDO CC linear linear regulator Connected to DRV regulator. Tying this pin to GND sets DRV CC. This LDO supplies CC to 6.0V. Ty- DRV ing this pin to INTV CC power from EXTVCC, bypassing the internal LDO CC sets DRVCC to 10V. Other voltages powered from V between 5V and 10V can be programmed by placing a IN or the external NDRV LDO whenever EXTV resistor (50k to 100k) between the DRVSET pin and GND. CC is higher than its switchover threshold (4.7V or 7.7V depending on the DRVUV pin). See DRV An internal 20µA pull-up current develops the voltage to CC Regulators in the Applications Information section. Do not exceed 14V be used as the reference to the DRVCC LDO. on this pin. Do not connect EXTVCC to a voltage greater
DRVUV (Pin 19):
DRVCC UVLO Program Pin. This pin than VIN. Connect to GND if not used. determines the higher or lower DRVCC UVLO and EXTVCC
RUN (Pin 34):
Run Control Input. Forcing this pin below switchover thresholds, as listed on the Electrical Character- 1.12V shuts down the controller. Forcing this pin below istics table. Connecting DRVUV to GND chooses the lower 0.7V shuts down the entire LTC3895, reducing quiescent thresholds whereas tying DRVUV to INTVCC chooses the current to approximately 10µA. This pin can be tied to V higher thresholds. Do not float this pin. IN for always-on operation. Do not float this pin.
TG (Pin 20):
High Current Gate Drives for Top N-Channel
PHASMD (Pin 36):
Control Input to Phase Selector. This MOSFET. This is the output of floating high side driver determines the CLKOUT phase relationships with respect with a voltage swing equal to DRVCC superimposed on to TG. Pulling this pin to ground forces CLKOUT to be the switch node voltage SW. out of phase 90° with respect to TG. Connecting this pin
SW (Pin 21):
Switch Node Connection to Inductor. to INTVCC forces CLKOUT to be out of phase 120° with
BOOST (Pin 22):
Bootstrapped Supply to the Topside respect to TG. Floating this pin forces CLKOUT to be out Floating Driver. A capacitor is connected between the of phase 180° with respect to TG. BOOST and SW pins. Voltage swing at the BOOST pin is
ILIM (Pin 37):
Current Comparator Sense Voltage Range from approximately DRVCC to (VIN + DRVCC). Input. Tying this pin to GND or INTVCC or floating it sets
BG (Pin 24):
High Current Gate Drive for Bottom (Syn- the maximum current sense threshold to one of three chronous) N-Channel MOSFET. Voltage swing at this pin different levels (50mV, 100mV, and 75mV, respectively). is from ground to DRVCC.
INTVCC (Pin 38):
Output of the Internal 5V Low Dropout
DRV
Regulator. CLKOUT and many of the low voltage analog and
CC (Pin 26):
Output of the Internal or External Low Dropout Regulators. The gate drivers are powered from this digital circuits are powered from this voltage source. A low voltage source. The DRV ESR 0.1µF ceramic bypass capacitor should be connected CC voltage is set by the DRVSET pin. Must be decoupled to ground with a minimum of 4.7µF between INTVCC and GND, as close as possible to the IC. ceramic or other low ESR capacitor, as close as possible to the IC. Do not use the DRVCC pin for any other purpose. 3895fa 10 For more information www.linear.com/LTC3895 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions FREQ (Pin 17):
Frequency Control Pin for the Internal VCO.
NDRV (Pin 28):
Drive Output for External Pass Device Connecting the pin to GND forces the VCO to a fixed low of the NDRV LDO Linear Regulator for DRVCC. Connect frequency of 350kHz. Connecting the pin to INTVCC forces this pin to the gate of an external NMOS pass device. An the VCO to a fixed high frequency of 535kHz. Other fre- internal charge pump allows NDRV to regulate above VIN quencies between 50kHz and 900kHz can be programmed for low dropout performance. To disable this external by using a resistor between FREQ and GND. An internal NDRV LDO, tie NDRV to DRVCC. 20µA pull-up current develops the voltage to be used by
V
the VCO to control the frequency.
IN (Pin 30):
Main Supply Pin. A bypass capacitor should be tied between this pin and the GND pins.
DRVSET (Pin 18):
DRVCC Regulation Program Pin. This
EXTV
pin sets the regulated output voltage of the DRV
CC (Pin 32):
External Power Input to an Internal LDO CC linear linear regulator Connected to DRV regulator. Tying this pin to GND sets DRV CC. This LDO supplies CC to 6.0V. Ty- DRV ing this pin to INTV CC power from EXTVCC, bypassing the internal LDO CC sets DRVCC to 10V. Other voltages powered from V between 5V and 10V can be programmed by placing a IN or the external NDRV LDO whenever EXTV resistor (50k to 100k) between the DRVSET pin and GND. CC is higher than its switchover threshold (4.7V or 7.7V depending on the DRVUV pin). See DRV An internal 20µA pull-up current develops the voltage to CC Regulators in the Applications Information section. Do not exceed 14V be used as the reference to the DRVCC LDO. on this pin. Do not connect EXTVCC to a voltage greater
DRVUV (Pin 19):
DRVCC UVLO Program Pin. This pin than VIN. Connect to GND if not used. determines the higher or lower DRVCC UVLO and EXTVCC
RUN (Pin 34):
Run Control Input. Forcing this pin below switchover thresholds, as listed on the Electrical Character- 1.12V shuts down the controller. Forcing this pin below istics table. Connecting DRVUV to GND chooses the lower 0.7V shuts down the entire LTC3895, reducing quiescent thresholds whereas tying DRVUV to INTVCC chooses the current to approximately 10µA. This pin can be tied to V higher thresholds. Do not float this pin. IN for always-on operation. Do not float this pin.
TG (Pin 20):
High Current Gate Drives for Top N-Channel
PHASMD (Pin 36):
Control Input to Phase Selector. This MOSFET. This is the output of floating high side driver determines the CLKOUT phase relationships with respect with a voltage swing equal to DRVCC superimposed on to TG. Pulling this pin to ground forces CLKOUT to be the switch node voltage SW. out of phase 90° with respect to TG. Connecting this pin
SW (Pin 21):
Switch Node Connection to Inductor. to INTVCC forces CLKOUT to be out of phase 120° with
BOOST (Pin 22):
Bootstrapped Supply to the Topside respect to TG. Floating this pin forces CLKOUT to be out Floating Driver. A capacitor is connected between the of phase 180° with respect to TG. BOOST and SW pins. Voltage swing at the BOOST pin is
ILIM (Pin 37):
Current Comparator Sense Voltage Range from approximately DRVCC to (VIN + DRVCC). Input. Tying this pin to GND or INTVCC or floating it sets
BG (Pin 24):
High Current Gate Drive for Bottom (Syn- the maximum current sense threshold to one of three chronous) N-Channel MOSFET. Voltage swing at this pin different levels (50mV, 100mV, and 75mV, respectively). is from ground to DRVCC.
INTVCC (Pin 38):
Output of the Internal 5V Low Dropout
DRV
Regulator. CLKOUT and many of the low voltage analog and
CC (Pin 26):
Output of the Internal or External Low Dropout Regulators. The gate drivers are powered from this digital circuits are powered from this voltage source. A low voltage source. The DRV ESR 0.1µF ceramic bypass capacitor should be connected CC voltage is set by the DRVSET pin. Must be decoupled to ground with a minimum of 4.7µF between INTVCC and GND, as close as possible to the IC. ceramic or other low ESR capacitor, as close as possible to the IC. Do not use the DRVCC pin for any other purpose. 3895fa 10 For more information www.linear.com/LTC3895 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts